Reference design

AN4325

22/27

DocID024966 Rev 1

6

Reference design

6.1

Description

The reference design shown in Figure 9, introduces the STM32F030, a highly integrated

with 64 Kbytes of embedded Flash memory and 8 Kbytes of SRAM

.

6.1.1

Clock

Two clock sources are used for the microcontroller:



HSE: X1– 8 MHz crystal for the STM32F030 microcontroller



LSE: X2– 32.768 kHz crystal for the embedded RTC

Refer to Section 2: Clocks on page 12.

6.1.2

Reset

The reset signal in Figure 9 is active low. The reset sources include:



Reset button (B1)



Debugging tools via the connector CN1

Refer to Section 1.2.2: System reset on page 10.

6.1.3

Boot mode

The boot option is configured by setting BOOT0 through switch SW1 and option bit

nBOOT1. Refer to Section 3: Boot configuration on page 17.

6.1.4

SWD interface

The reference design shows the connection between the STM32F030 and a standard SWD

connector. Refer to Section 4: Debug management on page 18.

Note:

It is recommended to connect the reset pin in order to be able to reset the application from

the tool.

6.1.5

Power supply

Refer to Section 1.1: Power supply schemes.

6.1.6

Pinouts and pin description

Please refer to the STM32F030 datasheets available on www.st.com for the pinout

information and pin description of each device.