7

Analog-to-digital converter

For the ADC IP, there are no updates in term for structure but the only updates are related to the bits and registers naming.

7.1

STM32W108xx ADC Overview

Table 16 gives the list of the changes (renaming) made in the ADC bits and registers.

Table 16.

ADC bits and registers overview

Offset

Register

STM32W108xx ADC bits/registers naming overview

0xD004

ADC_CFG

Res

ADC_

PERIOD

ADC_

HVSELP

ADC_

HVSELN

ADC_MUXP

ADC_MUXN

ADC_

1MHZCLK

Reserved

ADC_

ENABLE

ADC_CR

Res SMP[2:0] HVSELP HVSELN CHSELP[3:0]

CHSELN[3:0]

CLK

Reserved

ADON

0xD008

ADC_

OFFSET

Res

ADC_OFFSET_FIELD

ADC_

OFFSETR

Res

OFFSET[15:0]

0xD00C

ADC_GAIN

Res

ADC_GAIN_FIELD

ADC_

GAINR

Res

GAIN[15:0]

0xD010

ADC_

DMACFG

Reserved

ADC_

DMARST

Reserved

ADC_DMAAUT

OWRAP

ADC_

DMALOAD

ADC_

DMACR

Reserved

RST

Reserved

AUTOWRAP

LOAD

0xD014

ADC_

DMASTAT

Reserved

ADC_

DMAOVF

ADC_

DMAACT

ADC_

DMASR

Reserved

OVF

ACT