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UM0842 датащи(PDF) 29 Page - STMicroelectronics |
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UM0842 датащи(HTML) 29 Page - STMicroelectronics |
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29 / 50 page ![]() UM0842 CPU board hardware description Doc ID 16542 Rev 4 29/50 A.2 Block descriptions A.2.1 Dynamic memory subsystem The Dynamic memory subsystem is composed of three major parts: Memory chip The SPEAr320 MPU supports up to 256 Mbytes of memory. Place and route is provided for 2 chips but only one has been populated. The memory used is a Micron DDR2 device, its part number is MT47H64M16HR-3 and its size is 128 Mbits x 8 (16 Mbits x 8 x 8 banks). Local power supply The local power supply is based on a monolithic voltage regulator for the chip set and DDR2/3 (PM6641). It is generated locally in order to minimize the layout impact and also to avoid any noise injection between different subsystems. Signal termination A parallel termination is added on the clock lines to compensate, if needed, for the layout dissymmetry. Two 100-Ohm resistors are used for each line in order to obtain an impedance of 50 Ohms. All the other terminations are directly inside the pads (both on the SPEAr320 MPU and the memory sides). A.2.2 Static memory subsystem Serial Flash memory The SPEAr320 MPU supports up to 16 Mbytes of Serial Flash memory. Place and route for 2 blocks of 8 Mbytes are provided on the board but only one is populated. It is based on an M25P64-VMF6P (Numonix) Serial Flash memory device. A resistor (R8) is also provided to protect the Flash memory from any unwanted write access. A.2.3 USB 2.0 subsystem Host ports The board has two host ports that are fully compliant with the USB 2.0 specification (two controllers with one port each). This means that the two hosts can work in concurrent mode with the maximum possible bandwidth. Each host has also full control of the VBUS supplied by the ST2052 power switch that also provides overcurrent protection in case of a short circuit in the USB cable. Device port A USB 2.0 device port is also provided. A.2.4 Debug interface The JTAG interface can be used for "static" debugging. This means that it is possible to set a breakpoint and, when the system stops, verify the contents of the memory and/or registers and modify them if needed. |
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