RM0312 datasheet(140/275 Pages) STMICROELECTRONICS

140 / 275 page

16-bit general purpose timer (TIM2/TIM3)

RM0312

140/275

DocID022352 Rev 3

For example, the OCiREF signal can be connected to the output of a comparator to be used

for current handling. In this case, the external trigger must be configured as follows:

The External Trigger Prescaler should be kept off: bits ETPS[1:0] in the TIMx_ETR

The external clock mode 2 must be disabled: bit ECE in the TIMx_ETR register set to

‘0’.

The External Trigger Polarity (ETP) and the External Trigger Filter (ETF) can be

configured as desired.

Refer to the external trigger input block diagram Figure 34 on page 117

Figure 61 shows the behavior of the OCiREF signal when the ETRF input becomes high, for

both values of the enable bit OCiCE. In this example, the timer is programmed in PWM

mode.

Figure 61. ETR activation

17.5.10

Encoder interface mode

This mode is typically used for motor control. To select Encoder Interface mode write

SMS=0b001 in the TIMx_SMCR register if the counter is counting on TI2 edges only,

SMS=0b010 if it is counting on TI1 edges only and SMS=0b011 if it is counting on both TI1

and TI2 edges.

Select the TI1 and TI2 polarity by programming the CC1P and CC2P bits in the

TIMx_CCER1 register. When needed, you can program the input filter as well.

The two inputs TI1 and TI2 are used to interface to an incremental encoder. Refer to

Table 34. The counter is clocked by each valid transition on TI1FP1 or TI2FP2 (TI1 and TI2

after input filter and polarity selection, TI1FP1=TI1 if not filtered and not inverted,

TI2FP2=TI2 if not filtered and not inverted) assuming that it is enabled (CEN bit in

TIMx_CR1 register written to ‘1’). The sequence of transitions of the two inputs is evaluated

and generates count pulses as well as the direction signal. Depending on the sequence the

counter counts up or down, the DIR bit in the TIMx_CR1 register is modified by hardware

accordingly. The DIR bit is calculated at each transition on any input (TI1 or TI2), whatever

the counter is counting on TI1 only, TI2 only or both TI1 and TI2.

OCiREF

counter (CNT)

OCiREF

ETRF

(OCiCE=’0’)

(OCiCE=’1’)

ETRF

becomes high

ETRF

still high

(CCRx)

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