PM0212

Programming STM8 Flash microcontrollers

Doc ID 022351 Rev 2

15/22

4.3

Word programming

Both main program memory and data EEPROM can be programmed and erased at word

level. Word operations are performed in the same way as block operations. They can be

executed either from program memory or from RAM.

When a new word program operation starts, EOP and WR_PG_DIS bits of FLASH_IAPSR

register are automatically cleared.

The EOP bit can then be used to know if the previous operation has completed. This bit is

automatically reset when reading FLASH_IAPSR.

The following sequence is required to perform a word program operation:

1.

Unlock the memory if not already done.

The UBC option byte can be read to check if the word you want to program is not in the

UBC area. If necessary, reprogram it to allow programming the targeted word.

2.

Write 0x40 in FLASH_CR2 (WP bit active).

3.

Write the 4 data bytes to the memory starting with the very first address of the word to

be programmed.

The programming cycle starts automatically when the 4 bytes have been written.

4.

Check the WR_PG_DIS bit in FLASH_IAPSR to verify if the word you attempted to

program was not write-protected (optional).

5.

To check if the program operation is complete, poll the EOP bit in FLASH_IAPSR

register for the end of operations. EOP is set to ‘1’ when the word program operation

has completed. To avoid polling the EOP bit, an interrupt can be generated when EOP

is set.

Caution:

EOP and WR_PG_DIS bits are cleared by reading the FLASH_IAPSR register. It is

consequently strongly recommended to perform one single read operation to the

FLASH_IAPSR register to check the values of these bits.

Caution:

If a word program operation is interrupted by a reset, the data programmed in the memory

may be corrupted.

4.4

Byte programming

Both main program memory and data EEPROM can be programmed and erased at byte

level.

Byte programming is performed by executing a write instruction (ld, mov...) to an address in

main program memory when the memory is unlocked. The write instruction initiates the

erase/program cycle and any core access to the memory is blocked until the cycle has

completed. This means that program execution from the Flash program memory is stopped

until the end of the erase/program cycle.

When a new byte program operation starts, EOP and WR_PG_DIS bits of FLASH_IAPSR

register are automatically cleared. At the end of the program operation, the EOP bit in the

FLASH_IAPSR register is set and the program execution restarts from the instruction

following the write/erase instruction.

The EOP bit can then be used in order to know if the previous operation has completed. To

avoid polling the EOP bit, an interrupt can be generated when EOP is set. This bit is

automatically reset when reading FLASH_IAPSR.