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AN3169 датащи(PDF) 3 Page - STMicroelectronics

номер детали AN3169
подробное описание детали  Technology performance comparison of Triacs subjected to fast transient voltages
PDF  12 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN3169 датащи(HTML) 3 Page - STMicroelectronics

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AN3169
Triac technologies and immunity
Doc ID 17194 Rev 1
3/12
Figure 3.
“Top” glass technology
Both top and mesa glass technologies are very cost effective. The insulation capability of
glass is very high. This helps to achieve high voltage devices with a limited periphery area.
Mesa glass technology is the cheaper one as this technology uses less silicon area to
withstand reverse voltage. For top technology, the reverse PN junction is terminated on the
upper side of the die thanks to the deep P well. Such dies are bigger for the same active
area than mesa dies. This is the reason why top technology is mainly used for low current
Triacs.
Unfortunately it is not possible to ensure a good operation of a die with glass passivation
when the voltage exceeds its maximum allowed value (VDRM or VRRM parameters). If the
voltage reaches the breakdown value, a current will flow through the die periphery, causing
heat dissipation at the glass-silicon interface. This heat could cause mechanical stress and
damage this interface. The device could then be damaged.
To develop switches able to work up to their breakdown voltage, a planar technology has to
be implemented. Such a technology uses photolithography to terminate the PN junction at
the top of the die, and oxide passivation instead of glass (see Figure 4). There is no more
glass-silicon interface issue. ACST devices use this kind of technology (see Reference 4).
Figure 4.
Planar technology
N+
P
N
P
N
N
N
P
Cathode
Anode
Metalization
Gate
Glass
Metalization
P
N
Cathode
Gate
Anode
P
N
P
Oxyde
Passivation
N
N
P
N
P
N
N
P
N
N



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