12

µPD66P04B

Data Sheet U13596EJ2V0DS00

3.3 Program Memory Reading Procedure

(1)

Pull down the pins not used to GND via resistor. Keep the CLK pin low.

(2)

(3)

µs.

(4)

(5)

Set the program memory address 0 clear mode by using the mode setting pins.

(6)

(7)

Set the program inhibit mode.

(8)

Set the verify mode. Data of each address is output sequentially each time the clock pulse is input to

the CLK pin four times.

(9)

Set the program inhibit mode.

(10) Set the program memory address 0 clear mode.

(12) Turn off power.

The following figure illustrates steps (2) through (10) above.

Reset

Oscillation stabilization

wait time

Hi-Z

Hi-Z

GND

GND

CLK

Data output

Data output

"L"