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AN2555 датащи(PDF) 30 Page - STMicroelectronics

номер детали AN2555
подробное описание детали  Porting an application from the ST10F269Zx to the ST10F276Z5
PDF  33 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN2555 датащи(HTML) 30 Page - STMicroelectronics

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AN2555 - Application note
Electrical characteristics
30/33
Multiplexed bus
Demultiplexed bus
Table 13.
Multiplexed bus timings (ns)
Symbol
Parameter
ST10F269Zx
ST10F276Z5
ST10F269Zx
fCPU = 40MHz
ST10F276Z5
fCPU = 40MHz
min.
max.
min.
max.
min.
max.
min.
max.
t6 CC
Address setup to
ALE
TCL - 10.5 +
tA
-
TCL - 11 +
tA
-2 + tA
-
1.5 + tA
-
t16 SR
ALE low to valid
data in
-
3 TCL -
19 + tA +
tC
-
3 TCL -
20 + tA +
tC
18.5 +
tA + tC
-
17.5 +
tA + tC
-
t17 SR
Address/Unlatche
d CS to valid data
in
-
4 TCL -
28 + 2tA
+ tC
-
4 TCL -
30 + 2tA
+ tC
22 +
2tA + tC
-
20 +
2tA + tC
-
t39 SR
Latched CS low to
Valid Data In
-
3 TCL -
19 + 2tA
+ tC
-
3 TCL -
21 + 2tA
+ tC
18.5 +
2tA + tC
-
16.5 +
2tA + tC
-
t44 CC
Address float after
RdCS, WrCS
(with RW delay)
-0
-
1.5
-
0
-
1.5
t45 CC
Address float after
RdCS, WrCS (no
RW delay)
-TCL
-
TCL +
1.5
-12.5-
14
Table 14.
Multiplexed bus timings
Symbol
Parameter
ST10F269Zx
ST10F276Z5
ST10F269Zx
fCPU = 40 MHz
ST10F276Z5
fCPU = 40 MHz
min.
max.
min.
max.
min.
max.
min.
max.
t6CC
Address setup
to ALE
TCL -
10.5 + tA
-
TCL - 11
+ tA
-2 + tA
-
1.5 + tA
-
t80CC
Address/Unlatc
hed CS setup
to RD, WR
(with RW
delay)
-2 TCL -
8.5 + 2tA
-2 TCL -
12.5 +
2tA
16.5 +
2tA
-
12.5 +
2tA
-
t81CC
Address/Unlatc
hed CS setup
to RD, WR (no
RW delay)
-
TCL - 8.5
+ 2tA
-
TCL - 12
+ 2tA
4 + 2tA
-
0.5 + 2tA
-
t16SR
ALE low to
valid data in
-3 TCL -
19 + tA +
tC
-3 TCL -
20 + tA +
tC
18.5 + tA
+ tC
-
17.5 + tA
+ tC
-
t17SR
Address/Unlatc
hed CS to valid
data in
-4 TCL -
28 + 2tA
+ tC
-4 TCL -
30 + 2tA
+ tC
22 + 2tA
+ tC
-
20 + 2tA
+ tC
-



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