UPD6465CS datasheet(8/52 Pages) NEC

8 / 52 page

µPD6464A,6465

1.3 Power-ON Clear Function

Because the internal status of the IC is unstable on power application, initialize the IC by making the PCL

pin high and executing a clear operation. When the clear operation has been performed, the following setting

is made:

•

Test mode is cleared.

•

All the character data of the video RAM (12 lines, 24 columns) are set to display OFF data (7EH (

µPD6464A)/FEH

(

µPD6465)) and the blinking data are set to OFF.

•

Video RAM write address (line 0, column 0) is set.

•

Character size is set to

×1 (minimum) on all lines.

•

Display is turned OFF and LC oscillation is turned ON.

The time required for the power-ON clear operation can be calculated by the following expression:

t = tPCLLNote + {video RAM clear time}

= 10 (

µs) + {10 (µs) + 12/fOSC (MHz) × 288 [µs]}

Note Refer to 7. ELECTRICAL SPECIFICATIONS Power-ON Clear Specification.

Remark

fOSC: LC oscillation frequency (dot clock frequency)

COMMAND DETAILS

2.1 Video RAM Batch Clear Command

This command can clear the video RAM with a single command.

00000000

The video RAM batch clear command performs the following setting:

•

Sets all the character data of the video RAM (12 lines, 24 columns) to display OFF data (7EH (

µPD6464A)/FEH

(

µPD6465)) and blinking data to OFF.

•

Sets a video RAM write address (line 0, column 0).

•

Sets the character size to

×1 (minimum) on all lines.

•

Turns display OFF and LC oscillation ON.

The time required for clearing the video RAM can be calculated by the following expression:

t = video RAM clear time

= 10 (

µs) + 12/fOSC (MHz) × 288 [µs]

Remark

fOSC: LC oscillation frequency (dot clock frequency)

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