AN2476 datasheet(22/49 Pages) STMICROELECTRONICS

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Power supply and clocks

AN2476

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Note:

This latency does not occur if the software fetches from SRAM when it restarts. Any access

to Flash will be performed correctly, but will result in wait states being inserted if the Flash is

not ready.

If you disable the OSC4M oscillator in STOP Mode, using the LP_PARAM15 bit in the Power

Management Control register (MRCC_PWRCTRL), the clock configuration is lost and

returns to reset state. Software must re-configure the clocks when the MCU wakes-up from

STOP mode.

Debug mode

If using the debug features of the ARM7TDMI-S, and the current application puts the MCU

in STOP mode, the debug connection will be lost, because the ARM7TDMI-S core is no

longer clocked.

However, using Low Power Debug mode, the software can be debugged even with extensive

use of STOP mode. To enable this feature, set the LPMC_DBG bit after RESET. In this

configuration, whenever a STOP mode entry sequence is successfully executed, the MCU

goes into WFI Mode instead of STOP mode, so the core keeps running and its debug

features remain active.

As WFI is performed instead of STOP mode, the WFI_FLASH_EN must be set (see

Section 1.8.4: WFI mode: Wait For Interrupt mode on page 16);

1.8.6

STANDBY mode

This mode is only available when using the embedded regulators (pin VREG_DIS tied to 0).

In STANDBY Mode, the MVREG (Main Voltage Regulator) is disabled and the internal

power switch opened (see Figure 2: STANDBY mode in power supply scheme 1 on page 6).

This powers off the kernel circuitry, reducing power consumption to almost zero. Only the

backup circuitry remains powered by the LPVREG (Low Power Voltage Regulator).

This mode is particularly important for applications requiring very low consumption even

when a rise in temperature occurs: there is almost no dispersion in temperature because the

leakage currents are very low (most of the digital part is not powered).

The contents of the registers and SRAM are lost. The backup circuitry can be used to wake-

up the microcontroller. Some backup registers also remain powered and can be used to

store some parameters. This backup circuitry consists of:

●

RTC counter and alarm mechanism

●

Wake-up logic

●

Backup registers (8 bytes)

The Wake-up logic switches the power to the kernel back on. The kernel is kept under

RESET until the internal voltage is correctly regulated; at this point the interface between

the kernel and Backup block is reconnected, and the CPU restarts from its RESET

sequence.

STANDBY mode entry procedure

Use the following procedure to enter STANDBY mode:

First select STANDBY Mode by programming the LPMC[1:0] bits in the

MRCC_PWRCTRL register.

Execute the Low Power Bit Writing Sequence as described in Section 1.8.1: Low power

bit writing sequence on page 14.

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