LTC4077

14

4077fa

Figure 4. Low Loss Input Reverse Polarity Protection

WALL

ADAPTER

DCIN

LTC4077

DRAIN-BULK

DIODE OF FET

4077 F04

Thermal Considerations

In order to deliver maximum charge current under all

conditions, it is critical that the exposed metal pad on the

backside of the LTC4077 package is properly soldered

to the PC board ground. When correctly soldered to a

has a thermal resistance of approximately 40°C/W. Failure

to make thermal contact between the exposed pad on the

backside of the package and the copper board will result in

thermalresistancesfargreaterthan40°C/W.Asanexample,

a correctly soldered LTC4077 can deliver over 800mA to

a battery from a 5V supply at room temperature. Without

a good backside thermal connection, this number would

drop to much less than 500mA.

Protecting the USB Pin and Wall Adapter Input from

Overvoltage Transients

Caution must be exercised when using ceramic capacitors

to bypass the USBIN pin or the wall adapter inputs. High

voltage transients can be generated when the USB or wall

adapter is hot plugged. When power is supplied via the

USB bus or wall adapter, the cable inductance along with

the self resonant and high Q characteristics of ceramic

capacitors can cause substantial ringing which could

exceed the maximum voltage ratings and damage the

LTC4077. Refer to Linear Technology Application Note 88,

entitled “Ceramic Input Capacitors Can Cause Overvoltage

Transients” for a detailed discussion of this problem.

Always use an oscilloscope to check the voltage wave-

forms at the USBIN and DCIN pins during USB and wall

adapter hot-plug events to ensure that overvoltage

transients have been adequately removed.

Reverse Polarity Input Voltage Protection

In some applications, protection from reverse polarity

voltage on the input supply pins is desired. If the sup-

ply voltage is high enough, a series blocking diode can

be used. In other cases where the voltage drop must be

kept low, a P-channel MOSFET can be used (as shown in

Figure 4).

APPLICATIO S I FOR ATIO