AN4460 datasheet(18/54 Pages) STMICROELECTRONICS

18 / 54 page

SMED implementation

AN4460

18/54

DocID026129 Rev 1



S(1): fault zone

This state is used to prevent damages due to an external malfunction (either

a hardware problem or an extreme fluctuation of the input voltage). The PWM

output line is set high during the transaction between S(0) and S(1) and turns the

MOSFET ON, leaving the current flow through the LEDs and the sense resistor. In

normal conditions, the current shouldn't reach the peak during S(1) and the S(2)

timer overflows, pushing the SMED to S(2). The S(1) time is set to be equal 33%

of the total TON state (S(1) + S(2)) maximum time. In exceptional conditions, the

CPPx signal arrives earlier, the S(1) timer expires and the SMED evolves to S(3)

(OCP). CPPx indicates the overcurrent in the circuit. The SMED timer is cleared

on exit.

Event_Jmp = event(1).

Event_Seq = TIM_Cnt.

On exit to S(3): clear SMED timer; set PWM to OFF.

On exit to S(2): do not clear SMED timer; turn ON the PWM output.



S(2): current limit

This state is used to find the current peak in normal conditions. The current peak is

imposed by the voltage configured on the DAC. When the CPPx event is detected,

the SMED advances to the S(0) state. During this state, the output PWM line is

high and the MOSFET is ON. A timer overflow indicates that the current has not

reached the selected peak, for example because the LED string is not attached.

This time is computed by the (66% + 20%)*2 equation 3. On exit, the PWM output

is set to 0 V, switching OFF the MOSFET. The next state is the non-sequential

state S(0).

Event_Jmp = N/A.

Event_Seq = Event(1) OR TIM_Cnt (“and/or” bit guarantees a non-sequential

jump).

On exit to S(0): reset timer, set PWM to 0.



S(3): overcurrent protection

When Event_Jmp is received during state S(1), the SMED has found an OCP

(overcurrent protection) event and goes to S(3). During the transaction, the PWM

output line is set to 0 V in order to turn the MOSFET OFF. The S(3) timer is set to

its maximum value (0x1F0 = 5 µs) to protect the hardware. When the SMED timer

overflows, the SMED advances to sequential S(0) state. The transaction also

generates an internal interrupt and the software can monitor the OCP and stop the

SMED evolution.

Event_Jmp = N/A.

Event_Seq = TIM_Cnt.

On exit to S(0): reset timer, generate SW interrupt.



HOLD S(0)

This state starts from S(1) when the software needs to stop the SMED evolution,

due to the dimming duty cycle OFF time. HOLD is also used when OCP is

detected during S(1). The PWM output line on HOLD state is 0 and the MOSFET

is OFF. When the FW sets the SWx bit to 1, the SMED goes back to S(1).

Note:

The register associated to the SMED is updated when either the SMED is on HOLD state

(during the dimming off-time) or the output PWM line is zero (S0 state).This approach

guarantees that the PWM output is always set to 0 when the new parameters are applied.

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