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AN4394 датащи(PDF) 14 Page - STMicroelectronics |
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AN4394 датащи(HTML) 14 Page - STMicroelectronics |
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14 / 18 page ![]() Component selection AN4394 14/18 DocID025512 Rev 1 Considering that I = C • dV/dt, it follows: Equation 10 Thus: Equation 11 4.3.3 UVP and EOC setting The pins UVP and EOC have to be connected to the STORE pin by the resistor partitioning R4, R5 and R6 to setup the related thresholds by scaling down those voltage values and by comparing them with the internal voltage reference set at 1.23 V. The design rules to setup the R4, R5 and R6 are the following: Equation 12 Equation 13 Further, in order to minimize the leakage due to the output resistor partitioning it has to be typically: Equation 14 10 M ≤ R4 + R5 + R6 ≤ 20 M IBATT MAX ILOAD MAX CSTORE VDROP MAX TLOAD ON ------------------------------------------------------------- – = CSTORE TLOAD ON ILOAD MAX IBATT MAX – VDROP MAX ------------------------------------------------------------------ VBG VUVP R5 R6 + R4 R5 R6 ++ ------------------------------------ = VBG VEOC R6 R4 R5 R6 ++ ------------------------------------ = |
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