AN3329 datasheet(17/47 Pages) STMICROELECTRONICS

17 / 47 page

AN3329

Functional check

Doc ID 18376 Rev 1

17/47

In Figure 26 details of Viper27LN operation at short detection is captured; once an output

short-circuit is detected, an internal current source charges the device internal circuitry and

stops the auxiliary converter operation until the VDD voltage drops down to VDD_RESTART

(4.5 V). At that time the internal HV current source is activated and charges the VDD

capacitor until it reaches the VDDon threshold, then the Viper27LN restarts switching via a

soft-start cycle. Hiccup cycles are repeated as long as the short-circuit condition lasts.

Viper27LN is resumed back to normal operation only when the short-circuit condition is

removed.

Figure 27 and 28 show the load regulation for the 5 V standby output. The standby supply

has been tested in the most critical situation, the transition from full load to no load and vice

versa. In fact, when a flyback converter is operating at full load, typically the self supply

voltage VDD spike is quite high, due to the effect of the leakage inductance. Once the load is

decreased or removed, VDD tends to reduce. Since the circuit works in burst-mode during

no load operation, at high mains the burst pulses have a low repetition rate due to the almost

negligible residual load. In this condition the VDD might drop below VDD_RESTART (4.5 V),

causing the auto-restart cycles activation by the controller and consequent reset by the

microprocessor powered by the 5 V standby. As can be seen in Figure 27 and 28, both

transitions are clean and there is no output voltage or Vcc dip.

Figure 27.

Standby supply dynamic load at

115 Vac - 60 Hz - PFC off

Figure 28.

Standby supply dynamic load at

115 Vac - 60 Hz - PFC on

CH2: VDD (pin #2)

CH3: +5 V standby

CH4: 5 V stby current

CH1: FB (pin #4)

CH3: 5 V standby

CH1: FB (pin #4)

CH2: VDD (pin #2)

CH4: 5 V stby current

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