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AN3009 датащи(PDF) 9 Page - STMicroelectronics |
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AN3009 датащи(HTML) 9 Page - STMicroelectronics |
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9 / 36 page ![]() AN3009 Designing a transition mode PFC Doc ID 16032 Rev 4 9/36 The mains frequency generates a 2 fL voltage ripple on the output voltage at full load. The ripple amplitude determines the current flowing into the output capacitor and the ESR. Additionally, a request for a certain hold-up capability can be sent to the PFC in case mains dips occur, in which case the output capacitor also has to be dimensioned taking into account the required minimum voltage value (Vout min) after the hold-up time (tHold) has elapsed. The PFC’s minimum switching frequency is one of the main parameters used to dimension the boost inductor; here the switching frequency is considered at low mains at the peak of the sinusoid and at full load conditions. As a rule of thumb, the switching frequency must be higher than the audio bandwidth to prevent audible noise. Additionally, it must not interfere with the L6564’s minimum internal starter period (reported in the datasheet). On the other hand, if the minimum frequency is too high, the circuit shows excessive losses at a higher input voltage and probably skips switching cycles not only at light loads. The typical minimum frequency range is 20 - 50 kHz for wide-range operation. To properly select the power components of the PFC and dimension the heatsinks if they are needed, the maximum operating ambient temperature around the PFC circuitry must be known. Note that this is not the maximum external operating temperature of the entire equipment, but rather the local temperature at which the PFC components are working. ● Maximum output voltage (Vdc): (7) ● Maximum output low frequency ripple: (8) ● Minimum output voltage after line drop (Vdc): (9) ● Holdup capability (ms): (10) ● Minimum switching frequency (kHz): (11) ● Maximum ambient temperature (°C): (12) V 430 VOVP = V 20 Vout = ∆ V 300 V min out = ms 10 tHold = kHz 40 f min sw = C 50 Tambx ° = |
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