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AN2989 датащи(PDF) 19 Page - STMicroelectronics |
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AN2989 датащи(HTML) 19 Page - STMicroelectronics |
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19 / 28 page ![]() AN2989 Interrupt generation Doc ID 15761 Rev 1 19/28 5 Interrupt generation The LIS331DLM can provide two interrupt signals and offers several possibilities to personalize these signals. The registers involved in the interrupt generation behavior are CTRL_REG3, INT1_CFG, INT2_CFG, INT1_THS, INT2_THS, INT1_DURATION, INT2_DURATION. The LIS331DLM interrupt signal can behave as free-fall, wakeup or 6D orientation detection. Whenever an interrupt condition is verified, the interrupt signal is generated and by reading the INT1_SRC and INT2_SRC registers it is possible to detect which condition has occurred. 5.1 Duration The content of the duration registers set the minimum duration of the Interrupt event to be recognized. Duration steps and maximum values depend on the ODR chosen. When in Normal mode, duration time is measured in N/ODR, where N is the content of the duration register and ODR is 50, 100, 400 Hz. When in low-power mode, duration time is measured in N/ODRLP, where N is the content of the duration register and ODRLP is 0.5, 1, 2, 5, 10 Hz. Table 15. Interrupt mode configuration AOI 6D Interrupt mode 0 0 OR combination of interrupt events 0 1 6 direction movement recognition 1 0 AND combination of interrupt events 1 1 6 direction position recognition Table 16. Duration of LSB value in normal mode ODR (Hz) Duration of LSB value (ms) 50 20 100 10 400 2.5 Table 17. Duration of LSB value in low-power mode ODR (Hz) Duration of LSB value (s) 0.5 2 11 20.5 |
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