AN1842 datasheet(7/17 Pages) STMICROELECTRONICS

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AN1842 APPLICATION NOTE

Figure 8. INPUT POWER @LOW LOAD

Here following, in figures 9 ad 10 some waveforms

during standby are shown:

Figure 9. Standby @115 VAC - 60Hz 5V @50mA

load

Figure 10. Standby @230 VAC - 50Hz 5V @

50mA load

Output voltage ripple @full load

Figure 11. Output voltage ripple @Vin = 115

Vac - 60 Hz and full load

In figure 11 the output voltage ripples at switching

frequency are measured.

As shown, the ripple

and the spikes are very low thanks to the addition-

al LC filters added on both output and avoiding the

use of bigger or expensive output capacitors.

The residual line frequency modulation is very low

at any input voltage.

Dynamic Load Tests

Figure 12 shows the output voltage regulation for

a dynamic load variation of the 5V output.

shown in the picture the voltage variation and the

response time are very good showing a good loop

behaviour. In fact, the 5V voltage variation is less

than 20mV (0,4%), and the spikes during the load

transition, due to the filter inductor on the output,

are only 75mV beyond the steady state (1,5%).

The measured recovery time is few tens of micro-

seconds. The variations induced on the 12V out-

put have been also checked without showing any

abnormal variation. Besides, the circuit response

has been verified at minimum, nominal and maxi-

mum input voltage, showing no significant change.

0.000

0.200

0.400

0.600

0.800

1.000

1.200

100

Iout +5V [mA]

Pin @115Vac

Pin@220Vac

CH1:

VQ4 - Drain

CH2:

VPIN8 (Vcc)

CH4:

VPIN6 (Comp)

CH1:

VQ4 - Drain

CH2:

VPIN8 (Vcc)

CH4:

VPIN6 (Comp)

CH3:

+5V Output voltage

CH4:

+12V Output voltage

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