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AN1518 датащи(PDF) 14 Page - STMicroelectronics |
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AN1518 датащи(HTML) 14 Page - STMicroelectronics |
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14 / 30 page ![]() PWM comparator AN1518 14/30 Where K is equal to 0.076. Therefore the PWM gain is also equal to: Equation 14 This means that even if the input voltage changes, the error amplifier does not change its value to keep the loop in regulation, thus ensuring a better line regulation and line transient response. In summary, the Open Loop Gain can be expressed as: Equation 15 Example: Considering RC = 2.7 kΩ, CC = 22 nF and CP = 220 pF, the poles and zeroes of A0 are: FP1 = 9 Hz FP2 = 256 kHz FZ1 = 2.68 kHz If L = 22 µH, COUT = 100 µF and ESR = 80 mΩ, the poles and zeroes of ALC become: FPLC = 3.39 kHz F0 = 19.89 kHz Finally R1 = 5.6 kΩ and R2 = 3.3 kΩ. The gain and phase bode diagrams are plotted respectively in Figure 11 and Figure 12. Figure 11. Module plot G PWM s () 1 K ---- const == Gs () G PWM s () R 2 R 1 R 2 + -------------------- • A O s () • A LC • s () = |
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