AN1537 APPLICATION NOTE

4/18

Since the full-load input power is greater than 50W, this adapter belongs to the third bracket envisaged by the

ECC. Its no load consumption is 0.9W @264Vac and 0.7W @220Vac then it meets Phase 1 limit (1W) and is

close to that of Phase 2 and 3 (0.75W) with almost no margin.

Although the ECC specifies that the compliance test be done at the nominal voltage 230 Vac, in the pre-com-

pliance test it is quite usual to refer to the consumption at 264 Vac, to account for production spread. With this

criterion the adapter cannot be considered compliant with Phase 2 or 3 limits.

The target of the optimization is then to make the adapter ECC-compliant in the above mentioned sense. Figure

3 shows the electrical schematic of the converter with the added and modified components highlighted. Only

these changes will be discussed.

Figure 3. 45W AC-DC adapter: electrical schematic of the modified circuit

1)

The oscillator has been modified to maintain the same frequency under normal operation (70kHz) at

full load and have a standby frequency equal to half the normal frequency (35kHz). The oscillator fre-

quency with no-load will be 5kHz. Further details on the calculations can be found in the appendix.

2)

The dummy load represented by the feedback components on the secondary side (170mW in the

original design) has been reduced at 40mW: R21 has been increased from 348

Ω to 3.16kΩ and,

consequently, R18 from 2.2 to 20k

Ω to maintain the same regulated output voltage. This reduces the

current consumption of the divider from 7.2 to 0.8mA. Additionally, R19 which was to provide 1mA

extra bias current to the reference of the PC905, has been taken out since it was not strictly necessary.

3)

The frequency compensation of the voltage control loop (C7, C14, R20) has been modified so as to

get a larger bandwidth - it has been almost doubled - and then a faster response. The main purpose

of that is to allow a correct start-up of the converter even with no load, whereas a slow feedback (ba-

sically, a large C14) causes the system to try continuously to restart under these conditions.

4)

R7 has been decreased from 4.7 to 1

Ω, to prevent the supply voltage of the L5991 from going below

the UVLO threshold with no load. To help this, the total consumption of the IC has been reduced by

0.3 mA by increasing R8 and R9 (from 5.6 to 22k

Ω and from 6.8 to 27kΩ, respectively). Although

with this change the voltage generated at full load is higher, it is still below the OVP threshold, set by

R5 and R6, with a safe margin.

These modifications are summarized in table 3.

88 to 264

Vac

BD1

DF04M

C1

100 µF

400 V

R1

56 k

Ω

10

R11

10

Ω

13

R14

1 k

Ω

15

12

R15

0.47

Ω

1/2 W

8

14

6

R6

330 k

Ω

43

2

R9 27 k

Ω

Ω

Ω

Ω

C5

3.3 nF

R13

12 k

Ω

Ω

Ω

Ω

7

Q1

STP7NB60

C9

330 µF

25 V

GND

IC1

L5991

C12

4.7 nF

2kV

D2

STTA106

R5 47 k

Ω

C2

47 µF

25 V

R10

22

Ω

5

9

DCC

R8 22 k

Ω

Ω

Ω

Ω

VREF

C4

100 nF

C6

56 nF

RCT

SS

DC-LIM

SGND

R3

2.2 M

Ω

C8

100 pF

11

PGND

ISEN

OUT

VC

VCC

DIS

COMP

VFB

T1

18V/2.5A

16

ST-BY

7

6

1

2

4

3

R19

N.A.

R17

4.3 k

Ω

R21

3.16 k

Ω

Ω

Ω

Ω

C7

3.3 nF

C3 100 nF

C14

8.2 nF

R16 100

Ω

R18

20 k

Ω

Ω

Ω

Ω

R20

180 k

Ω

Ω

Ω

Ω

D4 1N4148

D5

BYW29-200

R2

56 k

Ω

R4

2.2 M

Ω

C10

330 µF

25 V

C11

330 µF

25 V

IC2

PC905

N1

N2

N3

F1 T2A250V

D3

1N4148

D1

BZW06-154

NTC1 N.A.

R23 N.A.

R22

N.A.

C17

N.A.

C13

N.A.

C15

220 nF

Rc

5.9 k

Ω

Ω

Ω

Ω

R7 1

Ω

Ω

Ω

Ω

D6 1N4148

R12

12 k

Ω

Ω

Ω

Ω

D7 1N4148

R'

8.2 k

Ω

Ω

Ω

Ω