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AN1344 датащи(PDF) 4 Page - STMicroelectronics |
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AN1344 датащи(HTML) 4 Page - STMicroelectronics |
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4 / 14 page ![]() General circuit description AN1344 4/14 2 General circuit description The power supply has been designed for the upper voltage range. The lower voltage range utilizes a voltage doubler to raise the bulk voltage to 2 times the peak of the input line voltage. In the doubling mode, the current charges one capacitor for each phase of the line, therefore doubling the voltage. When SW1 is open, both capacitors are charged in series resulting in a bulk voltage equal to the peak of the line input. A wire jumper can be installed at production for units destined for countries using the lower range. The switching frequency operates at 100 kHz. The output can deliver 18 V from no load to 6 A continuous. The mode of operation ranges from discontinuous at high line minimum load to continuous at low line max load. This mode of operation was chosen to minimize the high peak currents of the discontinuous mode of operation. The VIPer100A-E can be regulated in secondary mode with an optocoupler giving excellent regulation or in the primary mode. Primary regulation works by regulating the Vdd pin at the output of the auxiliary winding. Depending on the coupling of the transformer, a 15% regulation can be achieved. In this application, by taking advantage of the dual regulation, a current limit scheme is obtained. This VIPer100A-E advantage, along with the transformer design, constitutes the overcurrent circuit. The transformer is designed for a turn ratio of operation for a universal input and an inductance to run in continuous conduction mode at one-half the output load. The coupling between the secondary to auxiliary winding along with the VIPer100A-E dual regulation plays an important part in the current limit. Under typical operation, the output is tightly regulated through U2 and U3, the optocoupler and TL431 respectively. As the output current increases, it causes the voltage at the auxiliary output to increase. R4 is selected to trim the voltage at Vdd to reach 13 V when the output current exceeds the maximum limit. At this point, primary regulation takes over and the output starts to fold-back. The output uses an STMicroelectronics 100 V Schottky diode for better efficiency. C9 and C10 are low ESR capacitors which manage the ripple current. U3 provides the reference and the feedback to tightly regulate the output. C7, C8, and R6 form the feed back loop compensation to optimize stability during transients. Table 1. Electrical specification Parameter Results Input voltage 90-132 VAC with jumper in, 180 - 264 VAC no jumper Output voltage J2 Load regulation (0.6 to 6 A) from set point +/- 0.6% Line regulation (at max load) +/- 0.05% Efficiency 86% @120 VDC and 87% @ 375 VDC Output ripple voltage 15 mV max Input power at no load 1.5 W typical Transient response, 50% load step +/- 350 mV, +/- 1.9%, 200 µs settling time EMI EN55022 and FCC class B |
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