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PD6P8 датащи(PDF) 21 Page - Renesas Technology Corp |
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PD6P8 датащи(HTML) 21 Page - Renesas Technology Corp |
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21 / 101 page ![]() 19 µPD6P8, 6P8A, 6P8B Data Sheet U17848EJ5V0DS 4. PORT REGISTERS (PX) The KI/O port, the KI port, the special ports (S0, S1/LED, S2, S3), and the control registers are treated as port registers. After reset, the port register values are as shown below. Figure 4-1. Port Register Configuration ( µPD6P8, 6P8A) Notes 1. ×: Refers to the value based on the KI and S2 pin state. 2. ×: Refers to the value based on decrease of power supply voltage (0 when VDD ≤ VID) Remark VID: RAM retention detection voltage Table 4-1. Relationship Between Ports and Reading/Writing ( µPD6P8, 6P8A) Port Name Input Mode Output Mode Read Write Read Write KI/O Pin state Output latch Output latch Output latch KI Pin state ——— S0 Pin state — Note — S1/LED Pin state — Pin state — S2 Pin state ——— Note When in OFF mode, “1” is always read. Port register P0 KI/O7 P00 After reset FFH KI/O6 KI/O5 KI/O4 KI/O3 KI/O2 KI/O1 KI/O0 P10 P1 KI3 P01 ××××11×1BNote 1 KI2 KI1 KI0 S1/LED S0 S2 1 P11 P3 (control register 0) DP11 P03 0000 ×000BNote 2 DP10 DP9 DP8 RAM retention flag ––– P13 P4 (control register 1) 0 P04 26H 0 KI Pull-down S0/S1 Pull-down S2 STOP release S1/LED mode KI/O mode S0 mode P14 |
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