PDP Sustain circuit

AN2503

14/30

The discharge current has also a sinusoidal profile, and is conducted by T3, T6, T5, Cp, and

T10. Once the panel is charged to Vs and visible light is emitted, current stops flowing and

the gas inside the glass stops ionizing. (Note that the use of IGBTs in the discharge section

requires extra care; indeed power devices requires freewheeling diodes to carry reverse

current due to the tank circuit formed between the panel capacitor Cp, L1 and the bus

capacitance).

At this time D1 is reverse biased and its reverse current charges the inductance L1. The

energy stored in the inductance is removed through the clamping current, and the clamping

current path is carried out by T3, D3, and D2. In this phase the reverse current of D1 is a key

parameter in power loss reduction. In fact, a lower clamping current means lower conduction

losses in T3, D2 and D3. Depending on the topology used, and in particular the clamping

diode's position, the time spent to evacuate the energy stored in the inductance can vary

significantly.

3.1.3

The next phase consists of bringing back to zero the panel capacitor voltage and reverse the

polarity of the voltage across Y-X electrodes.

In order to efficiently decrease the voltage on the panel capacitor, the energy stored in Cp

could be recovered back in the recovery capacitor CS1.This can be done by turning ON T2,

T6, T5, and T10.

The current path is shown in Figure 16. This current stops flowing when the voltage across

is half sinusoidal and its direction is from the panel Cp back to CS1.

Figure 16.

3.1.4

Clamping to ground

In order to bring completely to zero the panel capacitance, T10, T5, T6, and T4 are turned

ON, creating a current path across the panel through the equivalent resistances of power

devices and parasitic elements of the circuit.

Vs

Vs

Vs

Vset

L7

T9

T10

T8

T12

T11

-Vreset

Cp

CS1

CS2

L1

D7

D8

D6

D5

T7

D1

Vs

T3

T2

T1

T4

T6

T5

D2

D4

D3