10F202 datasheet(14/88 Pages) MICROCHIP

14 / 88 page

PIC10F200/202/204/206

DS40001239F-page 14

 2004-2014 Microchip Technology Inc.

4.3.2

SPECIAL FUNCTION REGISTERS

The Special Function Registers (SFRs) are registers

used by the CPU and peripheral functions to control the

operation of the device (Table 4-1).

The Special Function Registers can be classified into

two sets. The Special Function Registers associated

with the “core” functions are described in this section.

Those related to the operation of the peripheral

features are described in the section for each

peripheral feature.

TABLE 4-1:

SPECIAL FUNCTION REGISTER (SFR) SUMMARY (PIC10F200/202/204/206)

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

Power-On

Reset(2)

on Page

00h

INDF

Uses Contents of FSR to Address Data Memory (not a physical register)

xxxx xxxx

01h

TMR0

8-bit Real-Time Clock/Counter

xxxx xxxx

23, 27

02h(1)

PCL

Low-order 8 bits of PC

1111 1111

03h

STATUS

GPWUF

CWUF(5)

—TO

ZDC

00-1 1xxx

(3)

04h

FSR

Indirect Data Memory Address Pointer

111x xxxx

05h

OSCCAL

CAL6

CAL5

CAL4

CAL3

CAL2

CAL1

CAL0

FOSC4 1111 1110

06h

GPIO

—

GP3

GP2

GP1

GP0

---- xxxx

07h(4)

CMCON0

CMPOUT COUTEN

POL

CMPT0CS

CMPON CNREF CPREF

CWU

1111 1111

N/A

TRISGPIO

—

I/O Control Register

---- 1111

N/A

OPTION

GPWU

GPPU

T0CS

T0SE

PSA

PS2

PS1

PS0

1111 1111

Legend:

– = unimplemented, read as ‘0’, x = unknown, u = unchanged, q = value depends on condition.

Note

The upper byte of the Program Counter is not directly accessible. See Section 4.7 “Program Counter” for an

explanation of how to access these bits.

Other (non Power-up) Resets include external Reset through MCLR, Watchdog Timer and wake-up on pin change

Reset.

See Table 9-1 for other Reset specific values.

PIC10F204/206 only.

PIC10F204/206 only. On all other devices, this bit is reserved and should not be used.

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