AN3959 datasheet(47/65 Pages) STMICROELECTRONICS

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AN3959

Software setup to use the STA381BW/STA381BWS devices (ST Map)

Doc ID 022081 Rev 3

47/65

7.4

Startup

ST map selection

●

Select register map (ST Map)

–

0x7E (MISC4) bit D7 (SMAP) set to 0 (default is 1)

Clock and SAI configuration

●

Set clock selection (register 0x00)

–

For each Fs, if BICKI=32*Fs or 64*Fs, MCLK is ignored and the oversampling

clock is BICKI

–

If the multiplier is different from 32 or 64, MCLK is mandatory and the

configuration must be written in register 0x00

●

Set SAI interface

–

Select right digital interface (the default setting is I2S 24-bit), writing the register

0x01

Output configuration

●

Select configuration

–

2.0-channel is the default configuration

–

2.1-channel configuration (2 single-ended + 1 BTL)

–

2.1-channel configuration with external PWM and controls on auxiliary PWM (2

BTL + external PWM)

–

1-channel configuration (for subwoofer application)

Settings for class-AB

●

Select output configuration

–

Lineout: default setting (0) bit D7 (HPLN) register 0x55 (HPCFG)

–

Headphone: set bit D7 (HPLN) register 0x55 to 1 (HPCFG)

●

Enable class-AB

–

Set to 0 (default is 1) bit D5 (MUTE) of register 0x55 (HPCFG)

●

To verify that the device works properly read register 0x55

–

Bit D0 must be 1 (charge pump OK)

–

Bit D1 must be 0 (class-AB not in FAULT)

–

Bit D2 must be 1 (1.8 V core power supply OK)

Settings for enable F3X

●

Set register 0x59 (F3XCFG2) to 0x6D

The default value is 0x6E. This means bit D0 must be set to 1and bit D0 to 0.

–

After setting these bits, in F3XL there is analog output of channel 1 and in F3XR

there is analog output of ch 2. The volume control is bypassed.

–

To also control the volume it is mandatory to change the LOC1 and LOC0 bits (bit

D6 and D7 reg. 0x06)

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