Experimental results: efficiency and further considerations

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reduction at high input voltage is very effective in improving the overall efficiency, since the

higher turn-on and turn-off voltages make the switching losses critical.

Thanks to the storage time (lasting about 1.5 µs under this condition), that adds a delay to

the current on-time, the minimum on-time is much longer than the one imposed by the

L6565.

(see Figure 19 below). The system then works in advance at lower frequency as soon as

the input voltage increases or the load decreases.

Figure 19.

In the next figures the frequency reduction as a consequence of an increased input voltage

is shown.

Figure 20.

This "enhanced" frequency foldback created by the storage time allows keeping the total

power dissipation on the device very low regardless of the very high voltage needed to

sustain.