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AN3324 датащи(PDF) 29 Page - STMicroelectronics |
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AN3324 датащи(HTML) 29 Page - STMicroelectronics |
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29 / 37 page ![]() AN3324 CPU core initialization Doc ID 18311 Rev 2 29/37 A.2 Example of SPC56EL60 boot file for Flash In boot file user has to provide a reset vector in order to run the application from Flash memory. The standard startup process of SPC56ELX processor consists in execution of the special boot code which reads specific addresses in a Flash memory where reset configuration half word is stored together with boot reset vector pointing to first valid instruction of the code. Refer to “Boot Assist Module (BAM)” section in RM0032 (see B.1: Reference documents in Appendix B). In this boot sequence user must initialize SRAM and copy data section from Flash to SRAM (this operation is made only when user runs code from Flash). As it may see in scratch code below stated, this copy is split into two steps and between them it is inserted software watchdog refresh to avoid device reset. Table 3. SPC56EL60 registers to initialize Register ranges r0 - r31 spr1 spr8-spr9 spr22 spr26 - spr27 spr54 spr58 - spr59 spr61-spr63 spr256 spr272 - spr279 spr284 - spr285 spr318 - spr319 spr340 spr400-spr415 spr512 spr528-spr530 spr562 spr570 - spr571 spr573 - spr575 spr604 - spr605 spr628 spr630 ACC CR |
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