THCS134_Rev.1.00_E

Copyright©2014 THine Electronics, Inc.

THine Electronics, Inc.

Security E

11/19

Connection Example (Mode E, F, G)

Serialize

Latch

circuit

LEN_U

LEN_L

Deserialize

Selector

OEN_U

OEN_L

DIN[7:0]

DOUT[7:0]

Mode E

Mode F

Serialize

＆

Deserialize

Latch

Circuit

＆

I/O

conversion

LEN

OEN

Serialize

＆

Deserialize

Mode G

Mode D

DOUT[7:0]

DIN[7:0]

DIO[7:0]

・

Latch Enable, Output Enable Truth Table

Mode E

LEN_U

LEN_L

Latch Enable Input

L

L

Lower 8bit is transmitted by sampling frequency

(8bit through mode)

↑

H

Upper 8bit input latch

H

↑

Lower 8bit input latch and 16bit data reception

H

H

Keep data

The rising edge of LEN_L is the trigger for sampling of upper and lower data.

Mode F

OEN_U

OEN_L

Output Enable Input

L

L

Output disable

（

DATA pins are pulled down by 250kΩ internally）

L

H

Upper 8bit Output enable

H

L

Lower 8bit Output enable

H

H

Output disable

（

DATA pins are pulled down by 250kΩ internally）