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RNA51957AFPH0 датащи(PDF) 7 Page - Renesas Technology Corp |
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RNA51957AFPH0 датащи(HTML) 7 Page - Renesas Technology Corp |
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7 / 14 page ![]() RNA51957A, B Preliminary R03DS0010EJ0500 Rev.5.00 Page 7 of 13 Jun 19, 2012 Example of Application Circuit Reset Circuit of RNA51957 RL VCC R1 R2 RNA51957x RESET Logic circuit Input GND GND Delay capacitor Cd Power- supply Power- supply Output Figure 1 Reset Circuit of RNA51957 Notes: 1. The detecting supply voltage is VS (R1 +R2)/R2 (V) approximately. VS = 1.25 V (Typ) The detecting supply voltage can be set between 2 V and 15 V. 2. The delay time is about 0.34 Cd (pF) s. 3. If the RNA51957 and the logic circuit share a common power source, type A (built-in load type) can be used whether a pull-up resistor is included in the logic circuit or not. 4. The logic circuit preferably should not have a pull-down resistor, but if one is present, add load resistor RL to overcome the pull-down resistor. 5. When a negative supply voltage is used, the supply voltage side of RNA51957 and the GND side are connected to negative supply voltage respectively. Case of Using Reset Signal except Supply Voltage in the RNA51957 (a) Reset at ON (b) Reset at transistor ON Input RL VCC RESET Logic circuit Input GND Delay capacitor GND Cd R1 R2 RL VCC RESET Logic circuit GND Delay capacitor GND Cd R1 R2 Out put Out put RNA51957x RNA51957x Control signal Power- supply Power- supply Power- supply Power- supply Figure 2 Case of Using Reset Signal except Supply Voltage in the RNA51957 |
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