поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

82C55 датащи(PDF) 2 Page - Intersil Corporation

номер детали 82C55
подробное описание детали  Radiation Hardened CMOS Programmable Peripheral Interface
PDF  23 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  INTERSIL [Intersil Corporation]
домашняя страница  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

82C55 датащи(HTML) 2 Page - Intersil Corporation

  82C55 Datasheet HTML 1Page - Intersil Corporation 82C55 Datasheet HTML 2Page - Intersil Corporation 82C55 Datasheet HTML 3Page - Intersil Corporation 82C55 Datasheet HTML 4Page - Intersil Corporation 82C55 Datasheet HTML 5Page - Intersil Corporation 82C55 Datasheet HTML 6Page - Intersil Corporation 82C55 Datasheet HTML 7Page - Intersil Corporation 82C55 Datasheet HTML 8Page - Intersil Corporation 82C55 Datasheet HTML 9Page - Intersil Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 2 / 23 page
background image
971
HS-82C55ARH
Pin Description
SYMBOL
PIN
NUMBERS
TYPE
DESCRIPTION
PA0-7
1-4, 37-40
I/O
Port A: General purpose I/O Port. Data direction and mode is determined by the contents
of the Control Word.
PB0-7
18-25
I/O
Port B: General purpose I/O port. See Port A.
PC0-3
14-17
I/O
Port C (Lower): Combination I/O port and control port associated with Port B. See Port A.
PC4-7
10-13
I/O
Port C (Upper): Combination I/O Port and control port associated with Port A. See Port A.
D0-7
27-34
I/O
Bidirectional Data Bus: Three-State data bus enabled as an input when CS and WR are
low and as an output when CS and RD are low.
VDD
26
I
VDD: The +5V power supply pin. A 0.1
µF capacitor between pins 26 and 7 is recommend-
ed for decoupling.
GND
7
I
Ground.
CS
6
I
Chip Select: A “low” on this input pin enables the communication between the
HS-82C55ARH and the CPU.
RD
5
I
Read: A “low” on this input pin enables the HS-82C55ARH to send the data or status
information to the CPU on the data bus. In essence, it allows the CPU to “read from” the
HS-82C55ARH.
WR
36
I
Write: A “low” on this input pin enables the CPU to write data or control words into the
HS-82C55ARH.
A0 and A1
8, 9
I
Port Select 0 and Port Select 1: These input signals, in conjunction with the RD and WR
inputs, control the selection of one of the three ports or the control word registers. They are
normally connected to the Least Significant Bits of the address bus (A0 and A1).
Reset
35
I
Reset: A “high” on this input clears the control register and all ports (A, B, C) are set to the
input mode. “Bus hold” devices internal to the HS-82C55ARH will hold the I/O port inputs
to a logic “1” state with a maximum hold current of 400
µA.
Functional Diagram
GROUP A
CONTROL
POWER
SUPPLIES
DATA
BUS
BUFFER
GROUP B
CONTROL
READ/WRITE
CONTROL
LOGIC
RD
WR
A1
A0
RESET
CS
D7 - D0
BIDIRECTIONAL
DATA BUS
+5V
GND
8-BIT INTERNAL
DATA BUS
GROUP B
PORT B
(8)
GROUP B
PORT C
LOWER (4)
GROUP A
PORT C
UPPER (4)
GROUP A
PORT A
(8)
I/O
PA7 - PA0
I/O
PC7 - PC4
I/O
PC3 - PC0
I/O
PB7 - PB0
Spec Number
518060



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com