10-55

Programmable Quad Buffer Functional Block Diagram

LOGIC SELECT FOR INPUT (SSI) TO OUTPUT (VOX) DIV-BY NUMBER

PRSS-A

PRSS-B

PRSS-C

VO1, VO2, VO3

(POSS HIGH)

DIV-BY

VO4

(POSS HIGH)

DIV-BY

VO1, VO2

(POSS LOW)

DIV-BY

VO3, VO4

(POSS LOW)

DIV-BY

0

0

0

2121

001

12

6

12

6

010

14

7

14

7

011

16

8

16

8

100

18

9

18

9

1

0

1

20

10

20

10

1

1

0

22

11

22

11

DRIVER

(V, I PROT)

LIMITER

SQ. AMP

WITHHYS.

FREQ

DOUBLER

BUFFER

DIV BY 2

DIV BY 2

VOLT. REG. &

PRESCALER

DIV-BY

1 AND 6 - 11

14

12

11

9

17

20

16

15

4

2

6

10

PRSO

VO1

VO2

VO3

VO4

(POST SCALER SELECT)

GND

SSI

(BUFFER OUTPUT)

POSI

(PRESCALER SELECT)

DRIVER

(V, IPROT)

DRIVER

(V, IPROT)

DRIVER

(V, IPROT)

Q1

Q1

(SPEED SENSOR INPUT)

(POST SCALER INPUT)

CURRENT

SOURCE

POSS

PRSS

(PRESCALER OUTPUT)

OUTPUTS

ABC

EACH OUTPUT

PROTECTED BY A

20

Ω

COLLECTOR-TO-BASE

30V

ZENER DIODE CLAMP

4

7

12

3

11

12

13

6

14

5

10

98

CIRCLED NUMBERS ARE 20 LEAD SOP PACKAGE

VOX

BUF

Q4

5

1

HIP9020