5

BOOT (Pin 15)

This pin provides bias voltage to the upper MOSFET driver.

A bootstrap circuit may be used to create a BOOT voltage

suitable to drive a standard N-Channel MOSFET.

PGND (Pin 16)

This is the power ground connection. Tie the lower MOSFET

source to this pin.

LGATE (Pin 17)

Connect LGATE to the lower MOSFET gate. This pin

provides the gate drive for the lower MOSFET.

VCC (Pin 18)

Provide a 12V bias supply for the chip to this pin.

OVP (Pin 19)

The OVP pin can be used to drive an external SCR in the

event of an overvoltage condition.

RT (Pin 20)

This pin provides oscillator switching frequency adjustment.

200kHz switching frequency is increased according to the

following equation:

following equation:

Functional Description

Initialization

The HIP6002 automatically initializes upon receipt of power.

Special sequencing of the input supplies is not necessary.

The Power-On Reset (POR) function continually monitors

the input supply voltages and the enable (EN) pin. The POR

monitors the bias voltage at the VCC pin and the input

initiates soft start operation after both input supply voltages

exceed their POR thresholds. For operation with a single

before POR initiates operation.

The Power-On Reset (POR) function inhibits operation with

the chip disabled (EN pin low). With both input supplies

above their POR thresholds, transitioning the EN pin high

initiates a soft start interval.

Soft Start

The POR function initiates the soft start sequence. An

internal 10

µA current source charges an external capacitor

amplifier output (COMP pin) and reference input (+

terminal of error amp) to the SS pin voltage. Figure 3

clamp on the error amplifier (COMP pin) controls the

converter’s output voltage. At t1 in Figure 3, the SS voltage

reaches the valley of the oscillator’s triangle wave. The

oscillator’s triangular waveform is compared to the ramping

error amplifier voltage. This generates PHASE pulses of

increasing width that charge the output capacitor(s). This

interval of increasing pulse width continues to t2 . With

sufficient output voltage, the clamp on the reference input

controls the output voltage. This is the interval between t2

and t3 in Figure 3. At t3 the SS voltage exceeds the

DACOUT voltage and the output voltage is in regulation.

This method provides a rapid and controlled output voltage

rise. The PGOOD signal toggles ‘high’ when the output

voltage (VSEN pin) is with in

±5% of DACOUT. The 2%

hysteresis built into the power good comparators prevents

PGOOD oscillation due to nominal output voltage ripple.

Over-Current Protection

The over-current function protects the converter from a

shorted output by using the upper MOSFET’s on-resistance,

converter’s efficiency and reduces cost by eliminating a

current sensing resistor.

The over-current function cycles the soft-start function in a

programs the over-current trip level. An internal 200

µA current

over-current function initiates a soft-start sequence. The soft-

Fs

200kHz

510

6

•

R

()

---------------------

+

≈

Fs

200kHz

410

7

•

R

()

---------------------

–

≈

0V

0V

0V

TIME (5ms/DIV)

SOFT-START

(1V/DIV)

OUTPUT

(1V/DIV)

VOLTAGE

PGOOD

(2V/DIV)

FIGURE 3. SOFT START INTERVAL

HIP6002