HIP1013 datasheet(3/7 Pages) INTERSIL

3 / 7 page

2-408

Pin Description

PIN NO.

SYMBOL

FUNCTION

DESCRIPTION

12VS

12V Source

Connect to source of associated external N-Channel MOSFET switch to sense output

voltage.

12VG

12V Gate

Connect to the gate of associated N-Channel MOSFET switch. A capacitor from this

node to ground sets the turn-on ramp. At turn-on this capacitor will be charged to

≈17.4V

bya10

µA current source when in 5V/12V mode of operation, otherwise capacitor will be

charged to

≈11.4V.

3VDD

Chip Supply

Connect to 12V supply. This can be either connected directly to the +12V rail supplying

the load voltage or to a dedicated VDD +12V supply.

MODE/

PWRON1

Power ON/ Reset invokes

3.3V operation when

shorted to VDD, Pin 3.

PWRON1 and PWRON2 are used to turn-on and reset the chip. Both outputs turn-on

when either pin is driven low. After an over current limit fault, the chip is reset by the rising

edge of a reset signal applied to either PWRON pin. Each input has 100

µA pull up

capability which is compatible with 3V and 5V open drain and standard logic. PWRON1

is also used to invoke 3.3V control operation in preference to +12V control. By tying pin

4 to pin 3 the charge pump is disabled and the UV threshold also shifts to

≈2.8V.

PWRON2

Power ON/Reset

5VG

5V Gate

Connect to the gate of the external 5V N-Channel MOSFET. A capacitor from this node

to ground sets the turn-on ramp. At turn-on this capacitor will be charged to

≈11.4V by a

µA current source.

5VS

5V Source

Connect to the source side of 5V external N-Channel MOSFET switch to sense output

voltage.

5VISEN

5V Current Sense

Connect to the load side of the 5V sense resistor to measure the voltage drop across this

resistor between 5VS and 5VISEN pins.

PGOOD

Power Good Indicator

PGOOD is driven by an open drain N-Channel MOSFET. It is pulled low when either

output voltage is not within specification or and OC condition exists.

No Connection.

CPUMP

Charge Pump Capacitor

Connect a 0.1

µF capacitor between this pin and VDD (Pin 3).

GND

Chip Ground

RILIM

Current Limit Set Resistor

A resistor connected between this pin and ground determines the current level at which

current limit is activated. This current is determined by the ratio of the RILIM resistor to

the sense resistor (RSENSE). The current at current limit onset is equal to

µAx(RILIM/RSENSE).

12VISEN

12V Current Sense

Connect to the load side of sense resistor to measure the voltage drop across this

resistor.

HIP1013

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