ADE7166_15 datasheet(145/152 Pages) AD

145 / 152 page

ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569

Rev. B | Page 145 of 1

Table 163. Port 0 Alternate Functions

Pin No.

Alternate Function

Alternate Function Enable

P0.0

BCTRL external battery control input

Set INT1PROG = X01 in the interrupt pins configuration SFR (INTPR,

Address 0xFF).

INT1 external interrupt

Set EX1 in the interrupt enable SFR (IE, Address 0xA8).

INT1 wake-up from PSM2 operating mode

Set INT1PROG = 11X in the interrupt pins configuration SFR (INTPR,

Address 0xFF).

P0.1

FP19 LCD segment pin

Set FP19EN in the LCD Segment Enable 2 SFR (LCDSEGE2, Address 0xED).

P0.2

CF1 ADE calibration frequency output

Clear the DISCF1 bit in the ADE energy measurement internal MODE1

P0.3

CF2 ADE calibration frequency output

Clear the DISCF2 bit in the ADE energy measurement internal MODE1

P0.4

MOSI SPI data line

Set the SCPS bit in the configuration SFR (CFG, Address 0xAF) and set the

SPIEN bit in the SPI configuration SFR 2 (SPIMOD2, Address 0xE9).

SDATA I2C data line

Clear the SCPS bit in the configuration SFR (CFG, Address 0xAF) and set the

I2CEN bit in the I2C Mode SFR (I2CMOD, Address 0xE8).

P0.5

MISO SPI data line

Set the SCPS bit in the configuration SFR (CFG, Address 0xAF) and set the

SPIEN bit in the SPI configuration SFR 2 (SPIMOD2, Address 0xE9).

P0.6

SCLK serial clock for I2C or SPI

Set the I2CEN bit in the I2C Mode SFR (I2CMOD, Address 0xE8) or the SPIEN bit

in the SPI configuration SFR 2 (SPIMOD2, Address 0xE9) to enable the I2C or

SPI interface.

T0 Timer 0 input

Set the C/T0 bit in the Timer/Counter 0 and Timer/Counter 1 Mode SFR (TMOD,

Address 0x89) to enable T0 as an external event counter.

P0.7

SS SPI slave select input for SPI in slave mode

Set the SS_EN bit in the SPI configuration SFR 1 (SPIMOD1, Address 0xE8).

SS SPI slave select output for SPI in master mode

Set the SPIMS_b bit in the SPI configuration SFR 2 (SPIMOD2, Address 0xE9).

T1 Timer 1 input

Set the C/T1 bit in the timer/counter 0 and timer/counter 1 mode SFR (TMOD,

Address 0x89) to enable T1 as an external event counter.

Table 164. Port 1 Alternate Functions

Pin No.

Alternate Function

Alternate Function Enable

P1.0

RxD receiver data input for UART

Set the REN bit in the serial communications control register bit description

SFR (SCON, Address 0x98).

Rx edge wake-up from PSM2 operating mode

Set RXPROG[1:0] = 11 in the peripheral configuration SFR (PERIPH, Address

0xF4).

P1.1

TxD transmitter data output for UART

This pin becomes TxD as soon as data is written into SBUF.

P1.2

FP25 LCD segment pin

Set FP25EN in the LCD segment enable SFR (LCDSEGE, Address 0x97).

P1.3

FP24 LCD segment pin

Set FP24EN in the LCD segment enable SFR (LCDSEGE, Address 0x97).

T2EX Timer 2 control input

Set EXEN2 in the timer/counter 2 control SFR (T2CON, Address 0xC8).

P1.4

FP23 LCD segment pin

Set FP23EN in the LCD segment enable SFR (LCDSEGE, Address 0x97).

T2 Timer 2 input

Set the C/T2 bit in the timer/counter 2 control SFR (T2CON, Address 0xC8) to

enable T2 as an external event counter.

P1.5

FP22 LCD segment pin

Set FP22EN in the LCD segment enable SFR (LCDSEGE, Address 0x97).

P1.6

FP21 LCD segment pin

Set FP21EN in the LCD segment enable SFR (LCDSEGE, Address 0x97).

P1.7

FP20 LCD segment pin

Set FP20EN in the LCD segment enable SFR (LCDSEGE, Address 0x97).

Table 165. Port 2 Alternate Functions

Pin No.

Alternate Function

Alternate Function Enable

P2.0

FP18 LCD segment pin

Set FP18EN in the LCD segment enable 2 SFR (LCDSEGE2, Address 0xED).

P2.1

FP17 LCD segment pin

Set FP17EN in the LCD Segment enable 2 SFR (LCDSEGE2, Address 0xED).

P2.2

FP16 LCD segment pin

Set FP16EN in the LCD segment enable 2 SFR (LCDSEGE2, Address 0xED).

P2.3

SDEN serial download pin sampled on reset.

P2.3 is an output only.

Enabled by default.

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