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ADE7166 датащи(PDF) 123 Page - Analog Devices

номер детали ADE7166
подробное описание детали  Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
PDF  152 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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ADE7166 датащи(HTML) 123 Page - Analog Devices

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ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
Rev. B | Page 123 of 1
52
Table 133. RTC Alarm Interval SFR (INTVAL, Address 0xA6)
Bit
Mnemonic
Default
Description
[7:0]
INTVAL
0
The interval timer counts according to the time base established in the ITS bits of the RTC configuration SFR
(TIMECON, 0xA1). When the number of counts is equal to INTVAL, the ALARM flag is set and a pending
RTC interrupt is created. Note that the interval counter is eight bits. Therefore, it can count up to 255 seconds,
for example.
Table 134. RTC Nominal Compensation SFR (RTCCOMP, Address 0xF6)
Bit
Mnemonic
Default
Description
[7:0]
RTCCOMP
0
Holds the nominal RTC compensation value at 25°C. This register is retained during a watchdog reset
or an external reset. It is reset after a POR.
Table 135. RTC Temperature Compensation SFR (TEMPCAL, Address 0xF7)
Bit
Mnemonic
Default
Description
[7:0]
TEMPCAL
0
The TEMPCAL SFR is adjusted based on the temperature read in the TEMPADC SFR to calibrate the RTC
over temperature. This allows the external crystal shift to be compensated over temperature. This
register is retained during a watchdog reset or an external reset. It is reset after a POR.
Table 136. Interrupt Pins Configuration SFR (INTPR, Address 0xFF)
Bit
Mnemonic
Default
Description
7
RTCCAL
0
Controls the RTC calibration output. When set, the RTC calibration frequency selected by the FSEL bits
is output on the P0.2/CF1/RTCCAL pin.
[6:5]
FSEL
Sets RTC calibration output frequency and calibration window.
FSEL
Result (Calibration Window, Frequency)
0
0
30.5 sec, 1 Hz
0
1
30.5 sec, 512 Hz
1
0
0.244 sec, 500 Hz
1
1
0.244 sec, 16 kHz
4
Reserved
[3:1]
INT1PRG
000
Controls the function of the INT1 pin.
INT1PRG
Result
x
0
0
GPIO
x
0
1
BCTRL
0
1
x
INT1 input disabled
1
1
x
INT1 input enabled
0
INT0PRG
0
Controls the function of the INT0 pin.
INT0PRG
Result
0
INT0 input disabled
1
INT0 input enabled
Table 137. Key SFR (KYREG, Address 0xC1)
Bit
Mnemonic
Default
Description
[7:0]
KYREG
0
Write 0xA7 to this SFR before writing to the POWCON SFR, which unlocks KYREG.
Write 0xEA to this SFR before writing to the INTPR, HTHSEC, SEC, MIN, or HOUR timekeeping registers
to unlock KYREG.



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