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ADAV400

Rev. A | Page 21 of 36

Linear Update

Table 14. Target/Slew RAM Ramp Type Settings

Settings

Ramp Type

A linear update is the addition or subtraction of a constant value,

referred to as a step. The equation to describe this step size is

Linear

Constant dB

()

−

CONST

Step

Constant time

The result of the equation is normalized to a 5.23 data format.

This produces a time constant range from 6.75 ms to 213.4 ms

(–60 dB relative to 0 dB full scale). An example of this kind of

update is shown in

The following sections detail how the control port writes to the

target/slew RAM to control the time constant and ramp type

parameters.

Figure 23 and Figure 24. All slew RAM figure

examples, except the half-scale constant time ramp plot (Figure

Ramp Types [1:3]—Linear, Constant dB, RC (34-Bit Write)

), show an increasing or decreasing ramp between –80 dB and

0 dB (full scale). All figures except the constant time plots

(

The target word for the first three ramp types is broken into

three parts. The 34-bit command is written with six leading 0s

to extend the data write to five bytes. The parts of the target

RAM write are

Figure 28 and Figure 29) use a time constant of 0x7 (0x0 being

the fastest, and 0xF being the slowest).

TIME (ms)

1.0

0.4

0.6

0.8

0.2

–0.4

–0.2

–1.0

–0.8

–0.6

•

Ramp type (two bits).

•

Time constant (four bits).

•

0000 = fastest

1111 = slowest

•

Data (28 bits): 5.23 format.

Ramp Type 4—Constant Time (34-Bit Write)

The target word for the constant time ramp type is written in

five parts, with the 34-bit command written with six leading 0s

to extend the data write to five bytes. The parts of the constant

time target RAM write are

•

Ramp type (two bits).

•

Update step (one bit). Set to 1 when a new target is loaded

to trigger a step value update. The value is automatically

reset after the step value is updated.

Figure 23. Slew RAM—Linear Update Increasing Ramp

–1.0

–0.8

–0.6

–0.4

–0.2

0.2

0.4

0.6

0.8

1.0

TIME (ms)

•

Number of steps (three bits). The number of steps needed

to slew to the target value is set by these three bits, with the

number of steps equal to 23-bit setting + 6.

000 = 64

001 = 128

010 = 256

011 = 512

100 = 1024

101 = 2048

110 = 4096

111 = 8196

•

Data (16 bits): 2.14 format.

•

Reserved (12 bits). When writing to the RAM, set all of

these bits to 0.

Figure 24. Slew RAM—Linear Update Decreasing Ramp

Target/Slew RAM Initialization

On reset, the target/slew RAM initializes to preset values. The

target RAM initializes to a linear ramp type with a time constant

of 5 and the data set to 1.0. The slew RAM initializes to a value

of 1.0. These defaults result in a full-scale (1.0 to 0.0) ramp time

of 21.3 ms.

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