AD9517-3_15 datasheet(21/80 Pages) AD

номер детали	AD9517-3

подробное описание детали	12-Output Clock Generator with Integrated 2.0 GHz VCO

PDF	80 Pages

Scroll/Zoom	100%

производитель	AD [Analog Devices]

домашняя страница	http://www.analog.com

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21 / 80 page

Data Sheet

AD9517-3

Rev. E | Page 21 of 80

–140

–145

–150

–155

–160

–165

–170

0.1

100

PFD FREQUENCY (MHz)

Figure 13. PFD Phase Noise Referred to PFD Input vs. PFD Frequency

–210

–224

–222

–220

–218

–216

–214

–212

2.5

2.0

1.5

1.0

0.5

SLEW RATE (V/ns)

Figure 14. PLL Figure of Merit (FOM) vs. Slew Rate at REFIN/REFIN

1.9

1.7

1.5

1.3

1.1

0.9

1.7

1.8

1.9

2.0

2.1

2.2

2.3

VCO FREQUENCY (GHz)

Figure 15. VCO Tuning Voltage vs. Frequency

(Note that VCO calibration centers the dc tuning voltage

for the PLL setup that is active during calibration.)

–110

–100

–90

–80

–70

–60

–50

–40

–30

–20

–10

CENTER 122.88MHz

SPAN 50MHz

5MHz/DIV

Figure 16. PFD/CP Spurs; 122.88 MHz; PFD = 15.36 MHz;

LBW = 127 kHz; ICP = 3.0 mA; fVCO = 2.21 GHz

–110

–100

–90

–80

–70

–60

–50

–40

–30

–20

–10

CENTER 122.88MHz

SPAN 1MHz

100kHz/DIV

Figure 17. Output Spectrum, LVPECL; 122.88 MHz; PFD = 15.36 MHz;

LBW = 127 kHz; ICP = 3.0 mA; fVCO = 2.21 GHz

–110

–100

–90

–80

–70

–60

–50

–40

–30

–20

–10

CENTER 122.88MHz

SPAN 1MHz

100kHz/DIV

Figure 18. Output Spectrum, LVDS; 122.88 MHz; PFD = 15.36 MHz;

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