260

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

Ordering Information

PART NUMBER

TEMPERATURE RANGE

SCREENING LEVEL

PACKAGE

HCS190DMSR

Intersil Class S Equivalent

16 Lead SBDIP

HCS190KMSR

Intersil Class S Equivalent

16 Lead Ceramic Flatpack

HCS190D/Sample

Sample

16 Lead SBDIP

HCS190K/Sample

Sample

16 Lead Ceramic Flatpack

HCS190HMSR

Die

Die

HCS190MS

Radiation Hardened Synchronous

4-Bit Up/Down Counter

Pinouts

16 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T16

TOP VIEW

16 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP4-F16

TOP VIEW

TRUTH TABLE

INPUTS

OUTPUT

FUNCTION

PL

CE

U/D

CP

H

L

L

Count Up

H

L

H

Count Down

L

X

X

X

Preset

H

H

X

X

No Change

H = High Voltage Level

L = Low Voltage Level

X = Immaterial

=Positive Transistion

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

Q1

Q0

CE

U/D

Q2

GND

Q3

CP

RC

TC

PL

P2

P0

P1

VCC

P3

2

3

4

5

6

7

8

116

15

14

13

12

11

10

9

Q1

Q0

CE

U/D

Q2

GND

Q3

P1

CP

RC

TC

PL

P2

P0

VCC

P3

Features

• 3 Micron Radiation Hardened SOS CMOS

• Total Dose 200K RAD (Si)

(Typ)

• Latch-Up Free Under Any Conditions

• Significant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

- VIL = 30% of VCC Max

- VIH = 70% of VCC Min

• Input Current Levels Ii

≤ 5µA at VOL, VOH

Description

The Intersil HCS190MS is an asynchronously presettable BCD

Decade synchronous counter. Presetting the counter to the

number on the preset data inputs (P0 - P3) is accomplished by a

low on the parallel load input (PL). Counting occurs when (PL) is

high, Count Enable (CE) is low and the Up/Down (U/D) input is

either low for up-counting or high for down-counting. The counter

is incremented or decremented synchronously with the low-to-high

transition of the clock.

When an overflow or underflow of the counter occurs, the Terminal

Count output (TC), which is low during counting, goes high and

remains high for one clock cycle. This output can be used for look-

ahead carry in high speed cascading. The TC output also initiates

the Ripple Clock output (RC) which, normally high, goes low and

remains low for the low-level portion of the clock pulse. These

counter can be cascaded using the Ripple Carry output.

If the decade counter is preset to an illegal state or assumes an

illegal state when power is applied, it will return to the normal

sequence in one or two counts.

The HCS190MS utilizes advanced CMOS/SOS technology to

achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCS190MS is supplied in a 16 lead Ceramic flatpack

(K suffix) or a SBDIP Package (D suffix).

September 1995

Spec Number

518836

File Number

2251.2