123

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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HCS125MS

Radiation Hardened

Quad Buffer, Three-State

Pinouts

14 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T14, LEAD FINISH C

TOP VIEW

14 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP3-F14, LEAD FINISH C

TOP VIEW

Functional Diagram

TRUTH TABLE

INPUTS

OUTPUT

An

OEn

Yn

HLH

LLL

XH

Z

L = Low, H = High, X = Don’t Care, Z = High Impedance

OE1

A1

Y1

OE2

A2

Y2

GND

VCC

OE4

A4

Y4

OE3

A3

Y3

1

2

3

4

5

6

7

14

13

12

11

10

9

8

14

13

12

11

10

9

8

2

3

4

5

6

7

1

OE1

A1

Y1

OE2

A2

Y2

GND

VCC

OE4

A4

Y4

OE3

A3

Y3

An

OEn

Yn

n

P

Features

• 3 Micron Radiation Hardened SOS CMOS

• Total Dose 200K RAD (Si)

(Typ)

• Latch-Up Free Under Any Conditions

• Significant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

- VIL = 30% of VCC Max

- VIH = 70% of VCC Min

• Input Current Levels Ii

≤ 5µA at VOL, VOH

Description

The Intersil HCS125MS is a Radiation Hardened quad three-state

buffer, each having its own output enable input. A high level on the

enable input puts the output in a high impedance state.

The HCS125MS utilizes advanced CMOS/SOS technology to

achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCS125MS is supplied in a 14 lead Ceramic flatpack

(K suffix) or a SBDIP Package (D suffix).

Ordering Information

PART

NUMBER

TEMPERATURE

RANGE

SCREENING

LEVEL

PACKAGE

HCS125DMSR

Intersil Class

S Equivalent

14 Lead SBDIP

HCS125KMSR

Intersil Class

S Equivalent

14 Lead Ceramic

Flatpack

HCS125D/

Sample

Sample

14 Lead SBDIP

HCS125K/

Sample

Sample

14 Lead Ceramic

Flatpack

HCS125HMSR

Die

Die

September 1995

Spec Number

518831

File Number

3559.1