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HC5523IP датащи(PDF) 7 Page - Intersil Corporation

номер детали HC5523IP
подробное описание детали  LSSGR/TR57 CO/Loop Carrier SLIC with Low Power Standby
PDF  18 Pages
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производитель  INTERSIL [Intersil Corporation]
домашняя страница  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HC5523IP датащи(HTML) 7 Page - Intersil Corporation

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62
Circuit Operation and Design Information
The HC5523 is a current feed voltage sense Subscriber Line
Interface Circuit (SLIC). This means that for short loop
applications the SLIC provides a programed constant current to
the tip and ring terminals while sensing the tip to ring voltage.
The following discussion separates the SLIC’s operation into
its DC and AC paths, then follows up with additional circuit
and design information.
Constant Loop Current (DC) Path
SLIC in the Active Mode
The DC path establishes a constant loop current that flows
out of tip and into the ring terminal. The loop current is
programmed by resistors RDC1, RDC2 and the voltage on
the RDC pin (Figure 13). The RDC voltage is determined by
the voltage across R1 in the saturation guard circuit. Under
constant current feed conditions, the voltage drop across R1
sets the RDC voltage to -2.5V. This occurs when current
flows through R1 into the current source I2. The RDC voltage
establishes a current (IRSN) that is equal to VRDC/(RDC1
+RDC2). This current is then multiplied by 1000, in the loop
current circuit, to become the tip and ring loop currents.
For the purpose of the following discussion, the saturation
guard voltage is defined as the maximum tip to ring voltage
at which the SLIC can provide a constant current for a given
battery and overhead voltage.
For loop resistances that result in a tip to ring voltage less
than the saturation guard voltage the loop current is defined
as:
where: IL = Constant loop current.
RDC1 and RDC2 = Loop current programming resistors.
Capacitor CDC between RDC1 and RDC2 removes the VF
signals from the battery feed control loop. The value of CDC
is determined by Equation 2:
where T = 30ms
NOTE:
The minimum CDC value is obtained if RDC1 = RDC2
Figure 14 illustrates the relationship between the tip to ring
voltage and the loop resistance. For a 0
Ω loop resistance both
tip and ring are at VBAT/2. As the loop resistance increases,
so does the voltage differential between tip and ring. When
this differential voltage becomes equal to the saturation guard
voltage, the operation of the SLIC’s loop feed changes from a
constant current feed to a resistive feed. The loop current in
the resistive feed region is no longer constant but varies as a
function of the loop resistance.
Active State (C1, 2 = 0, 1)
On-Hook
ICC
-
3.7
5.8
mA
IEE
-
1.1
1.8
mA
IBAT
-
2.2
3.7
mA
PSRR
VCC to 2 or 4-Wire Port
(Note 30, Figure 12)
-
40
-
dB
VEE to 2 or 4-Wire Port
(Note 30, Figure 12)
-
40
-
dB
VBAT to 2 or 4-Wire Port
(Note 30, Figure 12)
-
40
-
dB
FIGURE 12. POWER SUPPLY REJECTION RATIO
Electrical Specifications
TA = -40
oCto85oC, V
CC = +5V ±5%, VEE = -5V ±5%, VBAT = -48V, AGND = BGND = 0V, RDC1 =RDC2 = 41.2kΩ,
RD = 39kΩ,RSG =0Ω,RF1 =RF2 =0Ω,CHP = 10nF, CDC = 1.5µF, ZL = 600Ω, Unless Otherwise Specified. All pin
number references in the figures refer to the 28 lead PLCC package. (Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
RT
RRX
600k
300k
RL
VTX
600
100mVRMS, 50Hz TO 4kHz
-48V SUPPLY
+5V SUPPLY
-5V SUPPLY
PSRR = 20 log (VTX/VIN)
TIP
27
VTX
19
RING
28
RSN
16
I
L
2.5V
R
DC1
R
DC2
+
--------------------------------------
1000
×
=
(EQ. 1)
C
DC
T
1
R
DC1
---------------
1
R
DC2
---------------
+


×
=
(EQ. 2)
HC5523



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