7-470

CD4069UBMS

FIGURE 10. TYPICAL PROPAGATION DELAY TIME vs SUPPLY

VOLTAGE

FIGURE 11. TYPICAL TRANSITION TIME vs LOAD

CAPACITANCE

FIGURE 12. TYPICAL DYNAMIC POWER DISSIPATION vs

FREQUENCY

FIGURE 13. VARIATION OF NORMALIZED PROPAGATION DELAY

TIME (tPHL AND tPLH) WITH SUPPLY VOLTAGE

FIGURE 14. DYNAMIC ELECTRICAL CHARACTERISTICS TEST CIRCUIT AND WAVEFORMS

15pF

LOAD CAPACITANCE (CL) = 50pF

120

100

80

60

40

20

0

5

10

15

20

SUPPLY VOLTAGE (VDD) (V)

LOAD CAPACITANCE (CL) (pF)

0

40

60

80

100

20

0

50

100

150

200

SUPPLY VOLTAGE (VDD) = 5V

10V

15V

SUPPLY VOLTAGE (VDD) = 15V

10

INPUT FREQUENCY (fI) (kHz)

10

8

6

4

28

6

4

28

6

4

28

6

4

2

8

6

4

2

8

6

4

2

8

6

4

2

8

6

4

2

10V

5V

10V

LOAD CAPACITANCE (CL) = 50pF

(11pF FIXTURE + 39pF EXT)

CL = 15pF (11pF FIXTURE +4pF EXT)

SUPPLY VOLTAGE (VDD) VOLTS

2

1

4

6

8

10121416

2

3

4

5

1

2

3

4

5

6

7

14

13

12

11

10

9

8

OUT

200k

Ω

CL = 50pF

PULSE GEN.

tr = tf = 20ns

IN

50

Ω

VDD

90%

50%

10%

90%

50%

10%

VDD

VDD

0

0

INPUT

INVERTING

OUTPUT

tr

tf

tTLH

tTHL

tPLH

tPHL