ADVANCE INFORMATION

21

AUTOMOTIVE — 83C196LC, 83C196LD

6.0 THERMAL CHARACTERISTICS

All thermal impedance data is approximate for static air conditions at 1 watt of power dissipation. Values will

change depending on operating conditions and the application. The Intel

240800) describes Intel’s thermal impedance test methodology. The

Components Quality and Reliability

7.0 DESIGN CONSIDERATIONS

The 83C196LC and 83C196LD are pin-compatible replacements for the 87C196JT and 87C196JR microcon-

trollers with the following exceptions.

•

The synchronous serial I/O port was enhanced to provide more flexible communication to other devices;

however, it remains compatible with the 87C196JT and JR non-enhanced SSIO.

•

The A/D converter was removed to optimize die size.

Follow these recommendations to help maintain hardware and software compatibility between 52-pin, 68-pin,

and future microcontrollers.

•

Bus width. Since the 83C196LC and LD have neither a WRH# nor a BUSWIDTH pin, the microcontrollers

cannot dynamically switch between 8- and 16-bit bus widths. Program the CCBs to select 8-bit bus mode.

•

Wait states. Since the 83C196LC and LD have no READY pin, the microcontrollers cannot rely on a

READY signal to control wait states. Program the CCBs to limit the number of wait states (0, 1, 2, or 3).

•

Write cycle during reset. If the microcontroller is reset during a write cycle, the contents of the external

memory device may be corrupted.

•

EPA7. This function exists in the83C196LC and LD, but the associated pin is omitted. You can use this

channel either as a software timer or to reset the timers.

•

EPA timer reset/write conflict. If an EPA channel resets the timer at the same time your code writes to

the timer, it is indeterminate which action takes precedence. If your code uses an EPA channel to reset a

timer, do not write to the timer.

•

Valid time matches. The timer must increment or decrement to the compare value for a valid match to

occur. Writing the compare value to the timer will not cause a match. Resetting the timer also will not

cause a match when the compare value is zero.

•

NMI. Since the 83C196LC and LD have no NMI pin, the nonmaskable interrupt is not supported. Initialize

the NMI vector (at location 203EH) to point to a RET instruction. This method provides glitch protection

only.

Table 12. Thermal Characteristics

Package Type

θ

JA

θ

JC

52-pin PLCC

NOTES:

1.

θ

ments are taken 1 ft. away from case in static air flow environment.

θ

2.

All values of

θ

how much airflow) and microcontroller power dissipation at temperature of operation. Typical varia-

3.

Values listed are at a maximum power dissipation of 0.50 W.