28F008B3 datasheet(17/49 Pages) INTEL

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SMART 3 ADVANCED BOOT BLOCK–BYTE-WIDE

PRELIMINARY

Table 4. Command Codes and Descriptions (Continued)

Code

Device Mode

Description

Program

Suspend

Erase

Suspend

Issuing this command will begin to suspend the currently executing

program/erase operation. The status register will indicate when the operation

has been successfully suspended by setting either the program suspend (SR.2)

or erase suspend (SR.6) and the WSM Status bit (SR.7) to a “1” (ready). The

WSM will continue to idle in the SUSPEND state, regardless of the state of all

input control pins except RP#, which will immediately shut down the WSM and

the remainder of the chip if it is driven to VIL. See Sections 3.2.4.1 and 3.2.5.1.

Read Status

This command places the device into read status register mode. Reading the

device will output the contents of the status register, regardless of the address

presented to the device. The device automatically enters this mode after a

program or erase operation has been initiated. See Section 3.2.3.

Clear Status

The WSM can set the Block Lock Status (SR.1) , V PP Status (SR.3), Program

Status (SR.4), and Erase Status (SR.5) bits in the status register to “1,” but it

cannot clear them to “0.” Issuing this command clears those bits to “0.”

Intelligent

Identifier

Puts the device into the intelligent identifier read mode, so that reading the

device will output the manufacturer and device codes (A0 = 0 for manufacturer,

A0 = 1 for device, all other address inputs are ignored). See Section 3.2.2.

NOTE:

See Appendix B for mode transition information.

3.2.2

READ INTELLIGENT IDENTIFIER

To read the manufacturer and device codes, the

device must be in read intelligent identifier mode,

which can be reached by writing the Intelligent

Identifier command (90H).

Once

intelligent

identifier mode, A0 = 0 outputs the manufacturer’s

identification code and A0 = 1 outputs the device

code. See Table 5 for product signatures. To return

to read array mode, write the Read Array command

(FFH).

Table 5. Intelligent Identifier Table

Device ID

Size

Mfr. ID

-T

(Top Boot)

-B

(Bottom

Boot)

8-Mbit

89H

D2H

D3H

16-Mbit

89H

D0H

D1H

3.2.3

READ STATUS REGISTER

The device status

when a

program or erase operation is complete, and the

success or failure of that operation. To read the

status register issue the Read Status Register

(70H) command to the CUI. This causes all

subsequent read operations to output data from the

status register until another command is written to

the CUI. To return to reading from the array, issue

the Read Array (FFH) command.

The status register bits are output on DQ0–DQ7.

The contents of the status register are latched on

the falling edge of OE# or CE#. This prevents

possible bus errors which might occur if status

OE# must be toggled with each subsequent status

read, or the status register will not indicate

completion of a program or erase operation.

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