Micropower dual 150mA CMOS RF LDO™ Regulators with 75dB Ripple Rejection

Impala Linear Corporation

2

(408) 574-3939

www.impalalinear.com

May 2000

ILC7280 1.8

Advance

Pin Number

1

2

3

4

5

6

7

8

Pin Name

GND

Pin Description

Regulator Output A

Ground

Regulator Output B

Voltage Reference Bypass: Connect external 22pF capacitor to GND to minimize

output noise in regulator “A” or “B.” May be left open. Do not ground.

Enable/Shutdown B (input): CMOS compatible input. Logic high = enable, logic low or

open = shutdown. Do not leave floating.

Supply Input B (Internally connected to pin 8)

*

Enable/Shutdown A (Input): CMOS compatible input. Logic high = enable, logic low or

open = shutdown. Do not leave floating.

Supply Input A (Internally connected to pin 6)

*

Galvanic connection only.

C

NOISE(optional)

1

2

3

4

5

6

7

8

V

INA

EN

A

V

INB

EN

B

V

OUTB

GND

V

OUTA

MSOP

(TOP VIEW)

ILC7280CS-XXXX

Pin-Package Configurations

Pin Functions ILC7280