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IDT7130LA55F датащи(PDF) 11 Page - Integrated Device Technology

номер детали IDT7130LA55F
подробное описание детали  HIGH-SPEED 1K x 8 DUAL-PORT STATIC RAM
PDF  14 Pages
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производитель  IDT [Integrated Device Technology]
домашняя страница  http://www.idt.com
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IDT7130LA55F датащи(HTML) 11 Page - Integrated Device Technology

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6.01
11
IDT7130SA/LA AND IDT7140SA/LA
HIGH-SPEED 1K x 8 DUAL-PORT STATIC RAM WITH INTERRUPTS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(2)
8M824S25
8M824S308M824S35
7130X20
(1)
7130X25
(3)
7130X35
7130X55
7130X100
7140X25(3)
7140X35
7140X55
7140X100
Symbol
Parameter
Min.
Max.
Min.
Max.
Min. Max.
Min.
Max.
Min.
Max.
Unit
Interrupt Timing
tAS
Address Set-up Time
0
0
0
0
0
ns
tWR
Write Recovery Time
0
0
0
0
0
ns
tINS
Interrupt Set Time
20
25
25
45
60
ns
tINR
Interrupt Reset Time
20
25
25
45
60
ns
2689 tbl 12
NOTES:
1.
0
°C to +70°C temperature range only, PLCC and TQFP packages.
2.
“X” in part numbers indicates power rating (SA or LA).
3.
Not available in DIP packages .
INT
INT
INT
INT
INT SET:
TIMING WAVEFORM OF INTERRUPT MODE
INT
INT
INT
INT
INT CLEAR:
NOTES:.
1. All timing is the same for left and right ports. Port “A” may be either left or right port. Port “B” is the opposite from port “A”.
2. See Interrupt Truth Table.
3. Timing depends on which enable signal (
CE or R/W) is asserted last.
4. Timing depends on which enable signal (
CE or R/W) is de-asserted first.
tINS
ADDR'A'
INT'B'
INTERRUPT ADDRESS
tWC
tAS
R/
W'A'
tWR
2689 drw 16
(3)
(3)
(2)
(4)
tRC
INTERRUPT CLEAR ADDRESS
ADDR'B'
OE'B'
tINR
INT'B'
2689 drw 17
tAS
(3)
(3)



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