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ICS9250-13 датащи(PDF) 6 Page - Integrated Circuit Systems

номер детали ICS9250-13
подробное описание детали  Frequency Generator & Integrated Buffers for PENTIUM/ProTM
PDF  15 Pages
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производитель  ICST [Integrated Circuit Systems]
домашняя страница  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS9250-13 датащи(HTML) 6 Page - Integrated Circuit Systems

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6
ICS9250-13
Byte 1: Control Register
(1 = enable, 0 = disable)
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
t
i
B#
n
i
PD
W
Pn
o
i
t
p
i
r
c
s
e
D
7
t
i
B-
1
)
d
e
v
r
e
s
e
R
(
6
t
i
B-
1
)
d
e
v
r
e
s
e
R
(
5
t
i
B-
X
#
2
S
F
4
t
i
B-
X
#
0
S
F
3
t
i
B8
41
)
t
c
a
n
I
/
t
c
A
(
3
K
L
C
U
P
C
2
t
i
B9
41
)
t
c
a
n
I
/
t
c
A
(
2
K
L
C
U
P
C
1
t
i
B1
51
)
t
c
a
n
I
/
t
c
A
(
1
K
L
C
U
P
C
0
t
i
B2
51
)
t
c
a
n
I
/
t
c
A
(
0
K
L
C
U
P
C
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
Byte 2: Control Register
(1 = enable, 0 = disable)
t
i
B#
n
i
PD
W
Pn
o
i
t
p
i
r
c
s
e
D
7
t
i
B-
X
#
3
S
F
6
t
i
B7
1
)
t
c
a
n
I
/
t
c
A
(
F
_
K
L
C
I
C
P
5
t
i
B5
11
)
t
c
a
n
I
/
t
c
A
(
5
K
L
C
I
C
P
4
t
i
B3
11
)
t
c
a
n
I
/
t
c
A
(
4
K
L
C
I
C
P
3
t
i
B2
11
)
t
c
a
n
I
/
t
c
A
(
3
K
L
C
I
C
P
2
t
i
B1
11
)
t
c
a
n
I
/
t
c
A
(
2
K
L
C
I
C
P
1
t
i
B0
11
)
t
c
a
n
I
/
t
c
A
(
1
K
L
C
I
C
P
0
t
i
B8
1
)
t
c
a
n
I
/
t
c
A
(
0
K
L
C
I
C
P
Byte 3: Control Register
(1 = enable, 0 = disable)
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
t
i
B#
n
i
PD
W
Pn
o
i
t
p
i
r
c
s
e
D
7
t
i
B6
31
)
t
c
a
n
I
/
t
c
A
(
7
M
A
R
D
S
6
t
i
B7
31
)
t
c
a
n
I
/
t
c
A
(
6
M
A
R
D
S
5
t
i
B9
31
)
t
c
a
n
I
/
t
c
A
(
5
M
A
R
D
S
4
t
i
B0
41
)
t
c
a
n
I
/
t
c
A
(
4
M
A
R
D
S
3
t
i
B2
41
)
t
c
a
n
I
/
t
c
A
(
3
M
A
R
D
S
2
t
i
B3
41
)
t
c
a
n
I
/
t
c
A
(
2
M
A
R
D
S
1
t
i
B5
41
)
t
c
a
n
I
/
t
c
A
(
1
M
A
R
D
S
0
t
i
B6
41
)
t
c
a
n
I
/
t
c
A
(
0
M
A
R
D
S
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
Byte 4: Control Register
(1 = enable, 0 = disable)
t
i
B#
n
i
PD
W
Pn
o
i
t
p
i
r
c
s
e
D
7
t
i
B6
21
)
t
c
a
n
I
/
t
c
A
(
5
1
M
A
R
D
S
6
t
i
B7
21
)
t
c
a
n
I
/
t
c
A
(
4
1
M
A
R
D
S
5
t
i
B0
31
)
t
c
a
n
I
/
t
c
A
(
3
1
M
A
R
D
S
4
t
i
B1
31
)
t
c
a
n
I
/
t
c
A
(
2
1
M
A
R
D
S
3
t
i
B7
11
)
t
c
a
n
I
/
t
c
A
(
1
1
M
A
R
D
S
2
t
i
B8
11
)
t
c
a
n
I
/
t
c
A
(
0
1
M
A
R
D
S
1
t
i
B0
21
)
t
c
a
n
I
/
t
c
A
(
9
M
A
R
D
S
0
t
i
B1
21
)
t
c
a
n
I
/
t
c
A
(
8
M
A
R
D
S
Byte 5: Control Register
(1 = enable, 0 = disable)
Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
t
i
B#
n
i
PD
W
Pn
o
i
t
p
i
r
c
s
e
D
7
t
i
B-
1
)
d
e
v
r
e
s
e
R
(
6
t
i
B-
1
)
d
e
v
r
e
s
e
R
(
5
t
i
B-
1
)
d
e
v
r
e
s
e
R
(
4
t
i
B5
51
)
t
c
a
n
I
/
t
c
A
(
C
I
P
A
O
I
3
t
i
B-
X
#
1
S
F
2
t
i
B-
1
)
d
e
v
r
e
s
e
R
(
1
t
i
B4
51
)
t
c
a
n
I
/
t
c
A
(
1
F
E
R
0
t
i
B2
1
)
t
c
a
n
I
/
t
c
A
(
0
F
E
R



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