2

ICS9248-112

Preliminary Product Preview

Third party brands and names are the property of their respective owners.

General Description

Pin Configuration

Power Groups

GNDREF, VDDREF = REF0, X1, X2

GNDPCI , VDDPCI = PCICLK [9:0]

GNDSDR, VDDSDR = SDRAM [7:0], SDRAM_F,

supply for PLL core

GND3V66,VDD3V66=3V66

GND48 , VDD48 = 48MHz, 24_48MHz,

VDDLAPIC = IOAPIC

GNDLCPU , VDDLCPU = CPUCLK [1:0]

The ICS9248-112 is the single chip clock solution for designs

using the 810/810E style chipset. It provides all necessary

clock signals for such a system.

Spread spectrum typically reduces system EMI by 8dB to

10dB. This simplifies EMI qualification without resorting to

board design iterations or costly shielding. The ICS9248-112

employs a proprietary closed loop design, which tightly

controls the percentage of spreading over process and

temperature variations.

stop clock programming and frequency selection.

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