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ICS9178-03 датащи(PDF) 5 Page - Integrated Circuit Systems

номер детали ICS9178-03
подробное описание детали  245 MHz Clock Generator and Integrated Buffer for PowerPC
PDF  8 Pages
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производитель  ICST [Integrated Circuit Systems]
домашняя страница  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS9178-03 датащи(HTML) 5 Page - Integrated Circuit Systems

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ICS9178-03
AC Characteristics
VDD =+5V ±5%, 0°C ≥ TAMBIENT ≥ +70°C unless otherwise stated
Note 1: Parameter is guaranteed by design and characterization. Not tested 100% in production.
Note 2: For 70Ω Load, 2XPCLK level may be pulled-up with a 390Ω resistor to meet minimum pulse width requirements
at both 1.8V and 0.6V at 240 MHz.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Input Frequency (Note 1)
fi
8
40.0
50.0
MHz
Input Clock Rise time (Note 1)
ICLKr
-
-
3
ns
Input Clock Fall time (Note 1)
ICLKf
-
-
3
ns
Output Frequency (2XPCLK)
fo2XPCLK
6X mode, 8X mode
75
245
MHz
4X mode
75
240
Output Rise time, 0.8 to 2.0V 20%
to 80% (Note 1)
tr2XPCLK
15pF load
0.8 to 2.0V
-
-
1.0
ns
20% to 80%
-
-
1.5
Fall time 2.0 to 0.8 80% to 20%
(Note 1)
tf2XPCLK
15pF load
2.0 to 0.8V
-
-
1.0
ns
80% to 20%
1.5
Output Rise time 80% to 20%
(Note 1)
t(TTL)r
15pF load
-
-
3.0
ns
Output Fall time 80% to 20%
(Note 1)
t(TTL)f
15pF load
-
-
2.0
ns
Duty cycle 2XPCLK (Note 1)
dt1
200 to 240 MHz @ 1.4V 110
ohm, 15pF load
42.5
50
57.5
%
Pulse Width, High, 2XPCLK
(Note 1, 2)
Tpwr
@ 1.8V, 110
Load 2
1.2
-
-
ns
Pulse Width, Low, 2XPCLK
(Note 1, 2)
Tpwr
@ 0.6V, 110
Load 2
1.0
-
-
ns
Duty cycle ABCLK (Note 1)
dt3
15pF load @ 1.4V (8X mode)
70
75
80
%
Duty cycle ABCLK (Note 1)
dt4
15pF load @ 1.4V 6X mode
61
66
71
%
15pF load @ 1.4V 4X mode
45
50
55
Duty cycle TTL (other clocks)
(Note 1)
dt5
15pF load @ 1.4V
45
50
55
%
Jitter 1 Sigma 2XPCLK (10,000
samples) (Note 1)
Tj1s1
for 200 to 240 MHz on
2XPCLK
-40
-
ps
Jitter 1 Sigma 1XPCLK B & D
(10,000 samples) (Note 1)
Tj1s2
for 200 to 240 MHz on
2XPCLK
-50
-
ps
Jitter 1 Sigma AB clock (10,000
samples) (Note 1)
Tj1s3
for 200 to 240 MHz on
2XPCLK
-60
-
ps
Jitter Absolute 2XPCLK (Note 1)
Tjabs1
for 200 to 240 MHz on
2XPCLK
-150
80
+150
ps
Jitter Absolute 1XPCLK, B, D
clocks (Note 1)
Tjabs2
for 200 to 240 MHz on
2XPCLK
-200
110
+200
ps
Jitter Absolute AB clock (Note 1)
Tjabs3
for 200 to 240 MHz on
2XPCLK
-250
120
+250
ps



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