8533AG-01

www.icst.com/products/hiperclocks.html

REV. B JULY 16, 2001

8

Integrated

Circuit

Systems, Inc.

ICS8533-01

R2

1K

V

CC

CLK_IN

+

-

R1

1K

C1

0.1uF

V_REF

R2

1K

V

CC

CLK_IN

+

-

R1

1K

C1

0.1uF

V_REF

Figure 8 shows how the differential input can be wired to accept single end levels. The reference voltage V_REF ~

V

to the input pin. The ratio of R1 and R2 might need to be adjusted to position the V_REF in the center of the

input voltage swing. For example, if the input clock swing is only 2.5V and V

R2/R1 = 0.609.