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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ICS1892Y-10 датащи(PDF) 45 Page - Integrated Circuit Systems |
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ICS1892Y-10 датащи(HTML) 45 Page - Integrated Circuit Systems |
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45 / 148 page  Chapter 7 Functional Blocks ICS1892, Rev. D, 2/26/01 February 26, 2001 45 ICS1892 © 2000-2001, Integrated Circuit Systems, Inc. All rights reserved. 7.3.6 4B/5B Encoding/Decoding The 4B/5B coding methodology maps each 4-bit nibble to a 5-bit symbol (also called a “code group”). There are 32 five-bit symbols, which include the following: • Of the 32 five-bit symbols, 16 five-bit symbols are required to represent the 4-bit nibbles. • The remaining 16 five-bit symbols are available for control functions. The IEEE Standard defines 6 symbols for control, and the remaining 10 symbols of this grouping are invalid. The 6 control symbols include the following: – /H/ represents a Transmit Error – /I/ represents an IDLE – Two symbols represent the Start-of-Stream Delimiter (SSD): /J/ and /K/ – Two symbols represent the End-of-Stream Delimiter (ESD): /T/ and /R/ If the ICS1892 PCS receives: – One of the 10 undefined symbols, it sets the QuickPoll Detailed Status Register’s Invalid Symbol bit (bit 17.7) to logic one. – A Halt symbol, it sets the Halt Symbol Detected bit in the QuickPoll Detailed Status Register (bit 17.6) to logic one. Note: By an STA (1) setting the Extended Control Register’s Transmit Invalid Codes bit (bit 16.2) to logic one and (2) asserting the TXER signal, an STA can force the ICS1892 to transmit symbols that are typically classified as invalid. For more information, see Section 8.11.7, “Invalid Error Code Test (bit 16.2)”. |
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