| поискавой системы для электроныых деталей |
|
ICS1892Y-10 датащи(PDF) 133 Page - Integrated Circuit Systems |
|
|
|||||||||||||||||||||||||||||
ICS1892Y-10 датащи(HTML) 133 Page - Integrated Circuit Systems |
|
133 / 148 page ![]() Chapter 10 DC and AC Operating Conditions ICS1892, Rev. D, 2/26/01 February 26, 2001 133 ICS1892 © 2000-2001, Integrated Circuit Systems, Inc. All rights reserved. 10.5.10 10M Serial Interface: Transmit Latency Table 10-17 lists the significant time periods for the 10M Serial Interface transmit latency. The time periods consist of timings of signals on the following pins: • 10TXEN (the 10M Serial Interface mapping of the 10M/100M MII TXEN pin) • 10TCLK (the 10M Serial Interface mapping of the 10M/100M MII TXCLK pin) • 10TD (the 10M Serial Interface mapping of the 10M/100M MII TXD0 pin) • TP_TX (the MDI mapping of the 10M/100M MII TP_TXP and TP_TXN pins) Figure 10-10 shows the timing diagram for the time periods. Figure 10-10. 10M Serial Interface Transmit Latency Timing Diagram Table 10-17. 10M Serial Interface Transmit Latency Timing Time Period Parameter Conditions Min. Typ. Max. Units t1 10TD Into TP_TX Out Delay 10M Serial Interface – – 2 Bit times 10TXEN 10TCLK 10TD (MDI) TP_TX t1 Bit A Bit B Bit A Bit B |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |